... energy-efficient design and new technologies that transform the user experience at the product ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...
... energy-efficient design and new technologies that transform the user experience at the product ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...
Debug SoC Design Engineer
Irvine, CA · On-site
$146K - $178K/yr
You will work closely with SoC architects and IP developers to define debug features that meet the power, performance, and area goals. You will own the design for the debug and trace hub. You will ...
Debug SoC Design Engineer
Irvine, CA · On-site
$146K - $178K/yr
You will work closely with SoC architects and IP developers to define debug features that meet the power, performance, and area goals. You will own the design for the debug and trace hub. You will ...
Principal SoC Design Engineer, HBM
Richardson, TX · On-site
$123K - $127K/yr
As an SoC Design Engineer , you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next-generation HBM SoC logic die. You will work ...
Principal SoC Design Engineer, HBM
Richardson, TX · On-site
$123K - $127K/yr
As an SoC Design Engineer , you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next-generation HBM SoC logic die. You will work ...
... energy-efficient design and new technologies that transform the user experience at the product ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...
... energy-efficient design and new technologies that transform the user experience at the product ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...
RTL Design Engineer - Wireless SoC
San Jose, CA · Remote
$55 - $60/hr
RTL Design Engineer - Wireless SoC Location: Remote Job Type: Contract We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will ...
Quick apply
RTL Design Engineer - Wireless SoC
San Jose, CA · Remote
$55 - $60/hr
RTL Design Engineer - Wireless SoC Location: Remote Job Type: Contract We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will ...
Debug SoC Design Engineer
Irvine, CA · On-site
$146K - $178K/yr
You will work closely with SoC architects and IP developers to define debug features that meet the power, performance, and area goals. You will own the design for the debug and trace hub. You will ...
Debug SoC Design Engineer
Irvine, CA · On-site
$146K - $178K/yr
You will work closely with SoC architects and IP developers to define debug features that meet the power, performance, and area goals. You will own the design for the debug and trace hub. You will ...
Debug SoC Design Engineer
Irvine, CA · On-site
$146K - $178K/yr
You will work closely with SoC architects and IP developers to define debug features that meet the power, performance, and area goals. You will own the design for the debug and trace hub. You will ...
Debug SoC Design Engineer
Irvine, CA · On-site
$146K - $178K/yr
You will work closely with SoC architects and IP developers to define debug features that meet the power, performance, and area goals. You will own the design for the debug and trace hub. You will ...
SoC Design Engineer
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
... integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC ... Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified ...
... integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC ... Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified ...
SoC Design Engineer
Santa Clara, CA · On-site
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
Quick apply
SoC Design Engineer
Santa Clara, CA · On-site
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
Quick apply
SoC Design Engineer
Santa Clara, CA · On-site
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
HBM SoC Design Engineer
Folsom, CA · On-site
$146K - $309K/yr
As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next-generation HBM SoC logic die. You will work ...
HBM SoC Design Engineer
Folsom, CA · On-site
$146K - $309K/yr
As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next-generation HBM SoC logic die. You will work ...
SoC Design Engineer
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
Principal SoC Design Engineer, HBM
Richardson, TX · On-site
$123K - $127K/yr
As an SoC Design Engineer , you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of nextgeneration HBM SoC logic die. You will work ...
Principal SoC Design Engineer, HBM
Richardson, TX · On-site
$123K - $127K/yr
As an SoC Design Engineer , you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of nextgeneration HBM SoC logic die. You will work ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
SoC Design Engineer
Santa Clara, CA · On-site
$110K - $140K/yr
Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...
Per Diem Soc Design Engineer information
See salary details
$43K - $56.6K
5% of jobs
$56.6K - $70.2K
2% of jobs
$78K is the 25th percentile. Wages below this are outliers.
$70.2K - $83.8K
31% of jobs
The median wage is $89.8K / yr.
$83.8K - $97.4K
27% of jobs
$97.4K - $111K
9% of jobs
$111.4K is the 75th percentile. Wages above this are outliers.
$111K - $124.5K
7% of jobs
$124.5K - $138.1K
7% of jobs
$138.1K - $151.7K
6% of jobs
$151.7K - $165.3K
1% of jobs
$165.3K - $178.9K
1% of jobs
$178.9K - $192.5K
2% of jobs
$43K
$103.5K
$192.5K
How much do per diem soc design engineer jobs pay per year?
As of Jun 10, 2026, the average yearly pay for per diem soc design engineer in the United States is $103,463.00, according to ZipRecruiter salary data. Most workers in this role earn between $81,000.00 and $122,500.00 per year, depending on experience, location, and employer.
What cities are hiring for Per Diem Soc Design Engineer jobs? Cities with the most Per Diem Soc Design Engineer job openings:
What are the most commonly searched types of Soc Design Engineer jobs? The most popular types of Soc Design Engineer jobs are:
What states have the most Per Diem Soc Design Engineer jobs? States with the most job openings for Per Diem Soc Design Engineer jobs include:
Apple rating
8.1
Based on 661 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
Come and join Apple's growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during crisis times, we encourage you to apply.
In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.
BS with 10+ years relevant experience.Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL languages like Verilog.
Shown experience writing micro-architecture specifications and converting them to design Exposure to design methodologies and industry standard EDA tools.Experience with AXI/AHB bus fabric and processor sub-systems.Understanding of UPF and low-power design & implementation techniques.Self-starter and willingness to learn.
In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.
BS with 10+ years relevant experience.Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL languages like Verilog.
Shown experience writing micro-architecture specifications and converting them to design Exposure to design methodologies and industry standard EDA tools.Experience with AXI/AHB bus fabric and processor sub-systems.Understanding of UPF and low-power design & implementation techniques.Self-starter and willingness to learn.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976