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Part Time Work From Home Analog Layout Design Engineer Jobs

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Work 1-2 hours in the morning, 1-2 hours in the afternoon Primary responsibility is to do daily issue management. Capture issue, resolve the issue by coordinating with drivers and close. This job ...

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Work 1-2 hours in the morning, 1-2 hours in the afternoon Primary responsibility is to do daily issue management. Capture issue, resolve the issue by coordinating with drivers and close. This job ...

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Part Time Work From Home Analog Layout Design Engineer information

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$77K

$186.2K

$203K

How much do part time work from home analog layout design engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for part time work from home analog layout design engineer in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Part Time Work From Home Analog Layout Design Engineer, and why are they important?

To thrive as a Part Time Work From Home Analog Layout Design Engineer, you need a solid background in electrical engineering and experience with analog circuit design and layout. Proficiency with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys Custom Compiler, as well as knowledge of design rule checks (DRC) and layout versus schematic (LVS) verification, is typically required. Strong attention to detail, self-motivation, and effective remote communication skills set top performers apart in this remote role. These competencies ensure accurate, efficient design work and successful collaboration despite the physical distance from colleagues and teams.

What is the difference between Part Time Work From Home Analog Layout Design Engineer vs Digital IC Design Engineer?

AspectPart Time Work From Home Analog Layout Design EngineerDigital IC Design Engineer
CredentialsTypically requires a degree in Electrical Engineering or related field, with experience in analog circuit designRequires a degree in Electrical Engineering or Computer Engineering, with expertise in digital logic design
Work EnvironmentRemote, flexible hours, focused on layout and analog circuit implementationUsually office-based or remote, focused on digital logic and circuit simulation
Industry UsageCommon in semiconductor companies, specializing in analog/mixed-signal ICsWidely used in semiconductor and electronics companies, focusing on digital integrated circuits

Both roles require a strong background in electrical engineering, but the analog layout design engineer focuses on analog circuit layout, while the digital IC design engineer concentrates on digital logic design. The part-time, remote nature of the analog role offers flexibility, whereas digital roles may involve more collaborative or on-site work.

What is a Part Time Work From Home Analog Layout Design Engineer?

A Part Time Work From Home Analog Layout Design Engineer is a professional who specializes in creating the physical layouts of analog integrated circuits, such as amplifiers or data converters, while working remotely and on a part-time basis. This role involves using electronic design automation (EDA) tools to draft and optimize circuit layouts, ensuring proper functionality and manufacturability. Working from home allows for flexible scheduling, and part-time hours can suit those seeking work-life balance. These engineers collaborate with circuit designers and verification teams virtually to deliver high-quality layouts that meet specifications and industry standards.

How does remote collaboration typically work for part-time analog layout design engineers, and what tools are commonly used to ensure smooth workflow?

As a part-time work-from-home analog layout design engineer, you’ll frequently collaborate with circuit designers and verification teams through virtual meetings and shared platforms. Communication is often managed via email, chat, and video conferencing tools, while layout reviews and design files are shared using version-controlled repositories and cloud-based EDA tools. Common industry-standard software includes Cadence Virtuoso and Synopsys Custom Compiler, alongside project management tools like Jira or Trello to track tasks. Clear documentation and regular check-ins are key to ensuring alignment with the broader engineering team, even when working remotely and part-time.
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Infographic showing various Part Time Work From Home Analog Layout Design Engineer job openings in the United States as of May 2026, with employment types broken down into 60% As Needed, 20% Full Time, and 20% Part Time. Highlights an 90% Physical, 3% Hybrid, and 7% Remote job distribution, with an average salary of $186,238 per year, or $89.5 per hour.
Analog Circuit Design Engineer Graduate Intern

Analog Circuit Design Engineer Graduate Intern

Intel Corporation

Santa Clara, CA • On-site, Remote

$89K - $120K/yr

Part-time

Medical, Retirement, PTO

Posted 6 days ago


Intel rating

8.8

Company rating: 8.8 out of 10

Based on 143 frontline employees who took The Breakroom Quiz

8th of 139 rated electronics manufacturers


Job description

Job Details:
Job Description:
The Role and Impact
Are you ready to launch your career in an environment that pushes the boundaries of innovation? As a Circuit Design Engineering Graduate Intern, you will play a pivotal role in shaping Intel's next-generation technologies. This exciting opportunity allows you to contribute to the design, simulation, and verification of digital and/or analog circuits, ensuring robust circuit implementation and integration. You will engage in hands-on projects that align with Intel's mission to develop cutting-edge solutions, while building skills that will shape your future in the semiconductor industry. Join us and make a meaningful impact on the technology that powers the future.
Key Responsibilities
  • Assist in designing, simulating, and verifying digital and/or analog circuits to meet Intel's high-performance standards.
  • Contribute to schematic entry, timing analysis, and optimization for power, performance, and area.
  • Perform noise glitch and signal integrity analysis to ensure robust circuit designs.
  • Collaborate with cross-functional teams to identify and implement innovative solutions for low-power and high-performance designs.
  • Perform debugging, hardware simulations, and circuit testing to validate design functionality.
  • Utilize and navigate EDA tools to execute floor planning and clock gating tasks.
  • Apply semiconductor device physics knowledge to analyze and improve circuit tradeoffs.
  • Continuously learn, adapt, and contribute to process improvements in alignment with Intel's culture of innovation.

Qualifications:
The Minimum qualifications are required to be initially considered for this position. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
This position is not eligible for Intel immigration sponsorship.
Minimum Qualifications
  • Must be pursuing a Master's or a Ph.D. degree in Electrical/Computer/Software Engineering, Computer Science, or related field of study
  • Proficiency in digital and/or analog circuit design principles and fundamentals.
  • Hands-on experience or knowledge of EDA tools, including circuit simulation and verification tools.
  • Knowledge of CMOS technologies and microarchitecture fundamentals.
  • Familiarity with power and performance analysis and optimization techniques.
  • Understanding of signal and power integrity concepts.
  • Coursework or experience in semiconductor device physics.

Preferred Qualifications
  • Strong analytical and problem-solving skills with attention to detail.
  • Excellent verbal and written communication skills to collaborate effectively within a team.
  • A passion for continuous learning and improvement.
  • Demonstrated ability to apply disciplined execution and technical rigor to projects.
  • Exposure to debugging complex hardware systems.

At Intel, we are committed to empowering you to explore and grow your potential in a dynamic, collaborative, and innovative environment. If you are excited about solving real-world challenges and want to make an impact in the semiconductor industry, we encourage you to apply and begin your journey with us.
Job Type:
Student / Intern
Shift:
Shift 1 (United States of America)
Primary Location:
Virtual US
Additional Locations:
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $89,200.00-120,700.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.
Work Model for this Role
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 07/01/2026
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968