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Packaging Engineer Intern Jobs in Riverside, CA (NOW HIRING)

RailPros

Office Engineer

Pomona, CA · On-site

$30 - $45/hr

... work packages for construction task orders and requests for bids * Assist in observing and ... Experience as an engineering intern in a related field Additional Qualifications, Certifications ...

RailPros

Office Engineer

Pomona, CA · On-site

$30 - $45/hr

... work packages for construction task orders and requests for bids * Assist in observing and ... Experience as an engineering intern in a related field Additional Qualifications, Certifications ...

Kimley-Horn

Civil Designer - Land Development

Irvine, CA · On-site

$90K - $125K/yr

... bid packages as well as technical specifications * As a critical member of the team, you will ... In-Training" or "Engineering Intern" certification (or ability to obtain within 12 months)

HDR

Highway Intern

Riverside, CA · On-site

$15.75 - $20.75/hr

We bring together planners, engineers, architects, construction management staff, environmental ... Demonstrated knowledge of software packages related to field of study/industry Qualifications ...

HDR

Highway Intern

Riverside, CA · On-site

$15.75 - $20.75/hr

We bring together planners, engineers, architects, construction management staff, environmental ... Demonstrated knowledge of software packages related to field of study/industry Required ...

NV5

Intern - Mechanical/Plumbing Engineering

Irvine, CA · On-site

$19 - $21/hr

Take engineer's rough plan mark-ups and modify or finalize design documents using AutoCAD/Revit ... NV5 offers a competitive compensation and benefits package including medical, dental, life ...

Niagara Bottling, LLC

Plant Engineering Manager

Ontario, CA · On-site

$118K - $168K/yr

Plant Engineering Manager Responsible for the design, construction, maintenance, and/or repair of ... package, while part-time, intern, and seasonal team members are offered a limited benefits package.

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All JobsPackaging Engineer Intern JobsPackaging Engineer Intern Jobs in Riverside, CA

Packaging Engineer Intern information

See Riverside, CA salary details

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How much do packaging engineer intern jobs pay per hour?

As of Jun 8, 2026, the average hourly pay for packaging engineer intern in Riverside, CA is $20.15, according to ZipRecruiter salary data. Most workers in this role earn between $16.78 and $21.83 per hour, depending on experience, location, and employer.

What does a Packaging Engineer Intern do?

A Packaging Engineer Intern supports the design, testing, and development of packaging solutions for products. They collaborate with engineering teams to improve packaging efficiency, sustainability, and cost-effectiveness. Responsibilities may include material selection, prototyping, and conducting tests to ensure packaging meets quality and regulatory standards. Interns may also assist in troubleshooting packaging issues and optimizing production processes. This role provides hands-on experience in the packaging industry and insight into real-world engineering challenges.

What types of projects or tasks can a Packaging Engineer Intern expect to work on during their internship?

As a Packaging Engineer Intern, you can expect to be involved in projects such as designing package prototypes, conducting performance and durability testing, analyzing packaging materials, and supporting the implementation of cost-saving or sustainability initiatives. You may collaborate with cross-functional teams including manufacturing, quality, and logistics to ensure packaging solutions meet both technical and commercial requirements. Interns often assist with documentation, data analysis, and generating reports to recommend improvements. This hands-on experience enables interns to develop practical engineering skills and gain exposure to the collaborative workflow typical in packaging development teams.

What are the key skills and qualifications needed to thrive in the Packaging Engineer Intern position, and why are they important?

A Packaging Engineer Intern should possess foundational knowledge in engineering, material science, or a related field, often obtained through coursework or relevant projects. Familiarity with CAD software, packaging design tools, and basic testing equipment is typically expected. Strong problem-solving abilities, attention to detail, and effective communication skills help interns collaborate and contribute to team projects. These skills ensure the intern can support the design, testing, and improvement of packaging solutions in a dynamic workplace.

What are popular job titles related to Packaging Engineer Intern jobs in Riverside, CA? For Packaging Engineer Intern jobs in Riverside, CA, the most frequently searched job titles are:
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Packaging Engineer Intern jobs near you
Infographic showing various Packaging Engineer Intern job openings in Riverside, CA as of May 2026, with employment types broken down into 27% Internship, 46% Full Time, and 27% Part Time. Highlights an 100% In-person job distribution, with an average salary of $41,913 per year, or $20.2 per hour.
Program Management Intern - SiC Power Modules

Program Management Intern - SiC Power Modules

Navitas Semiconductor

Irvine, CA • On-site

$25 - $40/hr

Internship

Posted 24 days ago

Job description

Job Purpose:
Navitas Semiconductor (Nasdaq: NVTS) is a next-generation power semiconductor leader driving innovation in gallium nitride (GaN) and high-voltage silicon carbide (SiC) technologies. Our products enable faster, more efficient power delivery across AI data centers, high-performance computing, energy and grid infrastructure, and industrial electrification.
With more than 30 years of combined expertise in wide bandgap technologies, GaNFast™ power ICs integrate GaN power, drive, control, sensing, and protection, delivering faster power delivery, higher system density, and greater efficiency. GeneSiC™ high-voltage SiC devices leverage patented trench-assisted planar technology to provide industry-leading voltage capability, efficiency, and reliability for medium-voltage grid and infrastructure applications.
We are seeking a high-performing graduate-level intern to join our Program Management team supporting the development of high-power SiC-based modules for AI infrastructure and electrification applications. The intern will take an active role in our New Product Introduction (NPI) process - coordinating cross-functional teams, tracking program milestones, and engaging directly with semiconductor suppliers to drive development projects to launch on time and within specification.
Key Responsibilities and Duties:
  • Lead and support NPI program management activities for SiC high-power module development programs targeting AI and electrification end markets.
  • Own and maintain detailed program schedules, milestone trackers, and risk registers to ensure programs launch on time and within technical specifications.
  • Coordinate and communicate with suppliers, manufacturing partners, and internal stakeholders to align on program requirements and deliverables.
  • Execute and refine the NPI process gate reviews - including design reviews, qualification milestones, and product release criteria.
  • Collaborate cross-functionally with R&D, applications engineering, operations, and quality teams to track action items and resolve program blockers.
  • Prepare executive program status reports, dashboards, and presentations for senior leadership review.
  • Support supplier development activities including monitoring qualification progress, tracking sample deliveries, and facilitating corrective action plans.

Minimum Qualifications
  • BS in Electrical Engineering (required); currently enrolled in or accepted to a graduate-level MS or PhD program in Electrical Engineering, Power Electronics, or closely related discipline.
  • Ability to communicate clearly with the internal team and external suppliers abroad. Professional, articulate speaking skills required.
  • Foundational knowledge of semiconductor device physics, power electronics, or semiconductor manufacturing processes.
  • Strong organizational and communication skills with demonstrated ability to manage multiple concurrent tasks and deadlines.
  • Proficiency in Microsoft Office Suite (Excel, PowerPoint, Project) and/or project management tools (e.g., Asana, Jira, Smartsheet).
  • Expert at using AI tools to assist in automating tasks and ideation (Copilot, Claude, PowerAutomate, PowerBI are preferred)

Preferred Qualifications
  • Prior internship, co-op, or research experience within the semiconductor, power electronics, or hardware product development industry.
  • Familiarity with Silicon Carbide (SiC) or Wide Bandgap (WBG) semiconductor technologies, process flows, or device characterization.
  • Exposure to NPI, stage-gate, or structured product development processes in a technology or hardware environment.
  • Understanding of power module packaging concepts (e.g., substrate types, thermal management, module assembly) for high-power applications.
  • Experience working in cross-functional or cross-cultural teams; prior exposure to Asia-Pacific supplier ecosystems is a plus.
  • Coursework or research in AI hardware, power conversion systems, or electrification platforms (EV, data center, renewable energy).

Apply