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Packaging Design Internship Jobs (NOW HIRING)

Marvell

Advanced Packaging Design Engineer

Chandler, AZ · On-site

$133K/yr

Lead Si/package/PCB/system co-design work collaborating with downstream system design teams and ... every stage - from internship to retirement and through life's most important moments. Our ...

Intel

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$105K - $149K/yr

As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... internship experiences. Minimum Qualifications * Bachelors with 1+ years of experience or master ...

Marvell

Advanced Packaging Design Engineer

Santa Clara, CA · On-site

$159K/yr

Lead Si/package/PCB/system co-design work collaborating with downstream system design teams and ... every stage - from internship to retirement and through life's most important moments. Our ...

Retrofete Inc.

Fashion Design Internship

New York, NY · On-site

Create packages for the team to be sent to factories and help track incoming packages. * Maintain ... Steam garments and organize design racks when necessary. Requirements * Must live in the New York ...

Retrofete Inc.

Fashion Design Internship

New York, NY · On-site

$60/hr

Create packages for the team to be sent to factories and help track incoming packages. * Maintain ... Steam garments and organize design racks when necessary. Requirements * Must live in the New York ...

Retrofete Inc.

Fashion Design Internship

New York, NY · On-site

Create packages for the team to be sent to factories and help track incoming packages. * Maintain ... Steam garments and organize design racks when necessary. Requirements * Must live in the New York ...

ULINE

UX Design Internship - Summer 2027

Kenosha, WI · On-site

UX Design Internship Paid Internship - Summer 2027 Corporate Headquarters 12575 Uline Drive ... and packaging materials with over 10,000 employees across 15 locations. Uline is a drug-free ...

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Packaging Design Internship information

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How much do packaging design internship jobs pay per hour?

As of Sep 3, 2026, the average hourly pay for packaging design internship in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What is a packaging design internship?

A Packaging Design Internship is a temporary role where interns assist in creating and developing packaging designs for products. Interns typically work with design teams to conceptualize, prototype, and refine packaging that aligns with branding and functional requirements. They may use design software like Adobe Illustrator or Photoshop and collaborate with marketing and production teams. This internship helps build practical experience in graphic design, material selection, and sustainability considerations in packaging.

What kinds of projects and responsibilities can I expect as a packaging design intern?

As a Packaging Design Intern, you will typically support senior designers in creating and refining packaging concepts, developing dielines, choosing materials, and preparing files for print production. You may participate in brainstorming sessions, conduct research on packaging trends and sustainability, and assist with mockups and prototype testing. Interns often have opportunities to present their ideas to cross-functional teams and receive feedback from design, marketing, and production departments. This hands-on involvement helps you understand the end-to-end packaging development process and build a strong professional portfolio.

What are the key skills and qualifications needed to thrive in a packaging design internship, and why are they important?

A strong foundation in graphic design, creativity, and attention to detail—often supported by coursework in design or related fields—is essential for a Packaging Design Internship. Familiarity with design software such as Adobe Creative Suite (Illustrator, Photoshop, InDesign) and an understanding of print production processes are typically required. Excellent communication, teamwork skills, and the ability to receive and implement feedback help interns collaborate effectively within multidisciplinary teams. These qualifications ensure interns can create appealing packaging concepts that meet branding requirements and practical constraints.

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Packaging Design Internship jobs near you
Infographic showing various Packaging Design Internship job openings in the United States as of August 2026, with employment types broken down into 6% Internship, 61% Full Time, 11% Part Time, 11% Temporary, and 11% Contract. Highlights an 94% In-person, and 6% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.

Silicon Packaging Design Engineer

Intel Corporation

Phoenix, AZ • On-site

$105K - $149K/yr

Full-time

Medical, Retirement, PTO

Re-posted 9 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 160 rated electronics manufacturers

Job description

Job Details:
Job Description:
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of advanced substrate designs, contributing to the creation of cutting-edge technology that fuels Intel's innovation. You will be responsible for the end-to-end development of substrate designs, from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability. This position provides an exciting opportunity to work collaboratively with silicon and hardware teams, directly impacting Intel's success in delivering world-class solutions for high-performance applications.
Key Responsibilities
  • Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements.
  • Perform substrate fit and routing studies to establish design, performance, and cost tradeoffs.
  • Define and implement substrate design rules, conducting internal and external reviews to ensure designs meet quality standards.
  • Analyze data, resolve Design Rule Checks (DRCs), and optimize package designs for manufacturability and performance.
  • Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.
  • Complete documentation and collateral into the product lifecycle management system of record

Behavioral traits
  • Problem-solving skills and a proactive approach to challenges.
  • Excellent communication and interpersonal skills for effective cross-functional collaboration.
  • Manage multiple tasks and projects simultaneously under tight deadlines.

Qualifications:
Minimum qualifications are required to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship
Knowledge and/or experience listed below would be obtained through a combination of your school/work and/or classes and/or research and/or relevant previous job and/or internship experiences.
Minimum Qualifications
  • Bachelors with 1+ years of experience or master's degree with 6 months of experience in Electrical Engineering, Mechanical Engineering, or Material Sciences disciplines.
  • 6+ months of experience with the following technical skills:
    • Experience and/or familiarity with microelectronic package or PCB physical layout design and manufacturing process.
    • Familiarity with package design tools like Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks.
    • Familiarity with physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversion.

Preferred Qualifications:
  • Experience in microelectronic package substrate design, package I/O routing, and/or technology development.
  • Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.
  • Experience with package design tools such as Package Layout Automation (PLA) and FIELD.
  • Experience with scripting using Python, VB, C, or similar languages

Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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