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New Grad Asic Design Verification Engineer Jobs in Raleigh, NC

Nvidia

Senior ASIC Power Engineer

Durham, NC

... verified, high performance, area and power efficient RTL to achieve design targets * You will be ... A new computing model - GPU deep learning - that enables computers to learn from data and write ...

Apple

RTL Design Engineer

Cary, NC · On-site

You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ... Bachelors of Science in Electrical Engineering. Proven knowledge of RTL design, Verilog and ...

Apple

RTL Design Engineer

Cary, NC · On-site

You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...

Apple

RTL Design Engineer

Cary, NC

You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... You will work to specify, design, verify, and support lab bring-up of sophisticated digital and ...

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All JobsNew Grad Asic Design Verification Engineer JobsNew Grad Asic Design Verification Engineer Jobs in Raleigh, NC

New Grad Asic Design Verification Engineer information

See Raleigh, NC salary details

$102.6K

$145K

$162.3K

How much do new grad asic design verification engineer jobs pay per year?

As of Jun 12, 2026, the average yearly pay for new grad asic design verification engineer in Raleigh, NC is $144,986.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,200.00 and $161,400.00 per year, depending on experience, location, and employer.

What does a New Grad ASIC Design Verification Engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a New Grad ASIC Design Verification Engineer, and why are they important?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

What are some common challenges new graduates face when starting as an ASIC Design Verification Engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.
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New Grad Asic Design Verification Engineer jobs near you
Infographic showing various New Grad Asic Design Verification Engineer job openings in Raleigh, NC as of June 2026, with employment types broken down into 100% Full Time. Highlights an 67% In-person, and 33% Hybrid job distribution, with an average salary of $144,986 per year, or $69.7 per hour.
Staff Engineer, Design Verification

Staff Engineer, Design Verification

Marvell

Morrisville, NC • On-site

Full-time

Life, Retirement

Posted yesterday

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for ASIC verification to craft creative solutions for DV architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. If you're creative and autonomous, we want to hear from you! At Marvell, you will have the opportunity to shape some of the most incredible products to address the needs of the next generation datacenters.

What You Can Expect

As a member of a dynamic ASIC development team, the candidate will be responsible for leading verification architecture, execution, delivery, post silicon validation , emulation of the next generation ASICs under development working closely with cross functional teams. The member will also have an opportunity to leverage the experience to drive the ASIC front end ASIC development process, emulation, PSV, tools and methodologies leading to the successful ASIC products.

What We're Looking For

  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 20+ years of related professional experience.
  • Master's degree in Computer Science, Electrical Engineering or related fields with 18+ years ofexperience.PhDin Computer Science, ElectricalEngineeringor related fields with 12+ years ofexperience.
  • Strongunderstanding of ASIC development process,toolsand verification methodologies.
  • Demonstrated track record of leading verification and delivery high quality ASICs.
  • Hands-on experience in verification of multiple SoC architectures, processor cores, memory subsystems and peripheral interfaces.
  • Hands-on experience of bringing up multiple ASICs in the lab.
  • Hands-on experience in driving emulation efforts leading to successful tapeout
  • Proven ability of leading ASIC development teams.
  • Excellent communication, interpersonal and presentation skills.
  • Strong cross-functional leadership skills.
  • Highly motivated, self-driven and ability to drive adoption of new methodologies.

Expected Base Pay Range (USD)

115,200 - 170,390, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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