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New Grad Asic Design Verification Engineer Jobs in Raleigh, NC

Nvidia

Senior ASIC Design Engineer - GPU

Durham, NC · Hybrid

We are now looking for a Senior ASIC Engineer. NVIDIA is searching for an outstanding ASIC Engineer ... Proficiency in Verilog, build and verification tools (VCS or equivalent simulation tools, debug ...

Nvidia

Senior ASIC Design Engineer - GPU

Durham, NC · Hybrid

We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer ... Proficiency in Verilog, build and verification tools (VCS or equivalent simulation tools, debug ...

ARM

Staff SoC Verification Engineer

Raleigh, NC · On-site

$198K - $268K/yr

New team members in Raleigh will join hands with other RTL design and verification engineers spread across UK, US, France and India & Canada to build best in class SoC's! Arm is building a team to ...

ARM

Staff SoC Verification Engineer

Raleigh, NC · Hybrid

$198K - $268K/yr

New team members in Raleigh will join hands with other RTL design and verification engineers spread across UK, US, France and India & Canada to build best in class SoC's! Arm is building a team to ...

IXL Learning

Software Engineer, New Grad

Raleigh, NC · On-site

$110K - $135K/yr

... New Grad Software Engineers who have a passion for technology and education to help us build new ... You'll be involved in all aspects of the development process - including design, coding, testing ...

IXL Learning

Software Engineer, New Grad

Raleigh, NC · On-site

$110K - $135K/yr

... New Grad Software Engineers who have a passion for technology and education to help us build new ... You'll be involved in all aspects of the development process - including design, coding, testing ...

Nvidia

Senior ASIC Power Engineer

Durham, NC · On-site

... verified, high performance, area and power efficient RTL to achieve design targets * You will be ... A new computing model - GPU deep learning - that enables computers to learn from data and write ...

Nvidia

Senior ASIC Power Engineer

Durham, NC · On-site

... verified, high performance, area and power efficient RTL to achieve design targets You will be ... A new computing model - GPU deep learning - that enables computers to learn from data and write ...

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All JobsNew Grad Asic Design Verification Engineer JobsNew Grad Asic Design Verification Engineer Jobs in Raleigh, NC

New Grad Asic Design Verification Engineer information

See Raleigh, NC salary details

$102.6K

$145K

$162.3K

How much do new grad asic design verification engineer jobs pay per year?

As of Sep 4, 2026, the average yearly pay for new grad asic design verification engineer in Raleigh, NC is $144,986.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,200.00 and $161,400.00 per year, depending on experience, location, and employer.

What does a new grad ASIC design verification engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a new grad ASIC design verification engineer?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What are some common challenges new graduates face when starting as an ASIC design verification engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

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For New Grad Asic Design Verification Engineer jobs in Raleigh, NC, the most frequently searched job titles are:

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New Grad Asic Design Verification Engineer jobs near you
Infographic showing various New Grad Asic Design Verification Engineer job openings in Raleigh, NC as of August 2026, with employment types broken down into 88% Full Time, 9% Part Time, and 3% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $144,986 per year, or $69.7 per hour.

Principal Design Verification Engineer

Marvell

Morrisville, NC • On-site

$127K - $155K/yr

Full-time

Life, Retirement

Re-posted 5 days ago

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform.
As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc.

What You Can Expect

  • Work on verification of Marvell's AI/ML, Network processing, Compute, Automotive, and Baseband SoCs and IPs.
  • Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers using System Verilog and UVM methodology.
  • Develop verification testplan and write tests using random techniques and coverage analysis, and work with designers to ensure it is complete.
  • Develop tests and tune the environment to achieve coverage goals.
  • Debug failures and work with designers to resolve issues.
  • Architecting, developing and maintaining tools to streamline the design of state-of-the-art multicore SoCs.
  • Experience with analysis/closure of code and functional coverage.

What We're Looking For

  • Strong experience developing complex/random verification environments using System Verilog/UVM.
  • Strong experience with writing and executing detailed verification test-plan.
  • Strong experience with scripting languages such as Python or Perl and EDA verification tools, as well as bug tracking and regression mechanisms.
  • Strong experience with object-oriented design and implementation.

Preferred/Plus:

  • Hands-on verification experience with subsystems such as ARM/processor, memory, networking, NoC, and Cache designs.
  • Experience with protocols such as AMBA, PCIe, Ethernet, I2C, SPI, and UART.
  • Working knowledge of C/C++ for modeling and code development to run on ARM/processors.
  • Familiarity with Post-Silicon validation and debug.
  • Experience with Gate Level Simulations.
  • Excellent communication skills to interface internally and externally with all levels of the organization and to participate in problem-solving and quality improvement activities.
  • Demonstrates good analysis and problem-solving skills.
  • Has an inherent sense of urgency and accountability.
  • Must have the ability to define problems, issues, and opportunities, analyze data, establish facts, and draw valid conclusions from various datasets.
  • Must have the ability to multi-task in a fast-paced environment.
  • Work independently & manage deliverables to align with the project goals

Education:

  • Bachelor's degree in Computer Science, Electrical Engineering, or related fields and 10-15 years of related professional experience.
  • Master's degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience.

Expected Base Pay Range (USD)

160,400 - 237,320, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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