Memory Circuit Design Jobs (NOW HIRING)

Position Summary

Role and Responsibilities

As a Senior Staff Memory/SRAM Circuit Design Engineer, you will help drive the development of high-performance, power- and area-efficient SRAM and custom memory macros that enable next-generation CPU and GPU applications. Your work will directly influence product competitiveness by delivering differentiated memory solutions optimized for advanced technology nodes.

In this high-impact individual contributor role, you will be part of a specialized custom design team driving innovation across circuit design and design-technology co-optimization (DTCO). You will translate advanced process capabilities into robust, production-ready memory solutions, influencing both circuit architecture and technology direction to achieve industry-leading performance, power, area (PPA) targets.

• Leveraging your expertise in one or more technical areas, you will contribute to the end-to-end design and delivery of SRAM and custom memory circuits, including transistor-level design, logic and functional verification, timing generation, layout supervision, physical verification (LVS/DRC), and post-layout validation (SPICE, EMIR/noise).

• You thrive on developing and applying advanced circuit design techniques, exploring new architectures and methodologies to optimize PPA targets beyond standard memory solutions.

• You help lead DTCO-driven innovation by analyzing the interaction between process technology and circuit behavior, and influencing layout rules, device characteristics, and memory architecture for advanced nodes (5nm) to the process technology team.

• You drive cross-functional collaboration with hardware design, architecture, SoC, software, and foundry teams to enable seamless integration of SRAM into system designs, while contributing to methodology, automation, and flow improvements that enhance design quality and productivity.

• You inspire high performance by mentoring junior engineers, fostering a culture of ownership and innovation, documenting designs and methodologies, and staying ahead of emerging memory technologies and advanced technology nodes.

Skills and Qualifications

• 11+ years of experience with a Bachelor's Degree in Computer Science/Engineering, or 9+ years of experience with a Master's Degree, or 7+ years of experience with a Ph.D.

• Strong expertise in SRAM circuit design, timing generation, logic/functional verification, and physical verification (LVS/DRC).

• Experience with advanced node design and DTCO, including technology, logic and memory cell architecture, and interconnect exploration, for below 5nm

• Strong proficiency with industry-standard design tools and scripting languages (Python, Perl)

• Strong understanding of computer architecture and SoC integration.

• Excellent analytical, and problem-solving skills, with the ability to propose data-driven solutions and guide execution.

• Excellent written and verbal communication skills for documenting designs, methodologies, and best practices.

• Excellent collaboration skills, with the ability to navigate ambiguity and influence in a fast-paced, global team environment.

Preferred qualifications:

• Multiple-Foundry experience is a big plus.

• Ability to design memory with excellent PPA (Power, Performance, Area) under given SPEC.

• Lead of memory bit cell and custom circuit related DTCO.

• Exposure to emerging technologies such as Processing-in-Memory (PIM).

Our Team

The Advanced Design Technology and Design Implementation teams play a critical role in enabling GPU and system-level development within Samsung SARC/ACL and the broader System LSI organization. Operating at the intersection of design technology and physical implementation, we partner closely with Foundry from early technology exploration through the full development cycle. Spanning advanced design methodologies, GPU physical design, CAD, and DTCO, we accelerate adoption of leading technology nodes and deliver optimized power, performance, area (PPA), silicon quality, and turnaround time for next-generation IP solutions.

You will join a highly collaborative, fast-paced environment working across parallel development cycles with direct impact on consumer technologies used worldwide. Here, you'll help build what's next: experimenting with new ideas, broadening your technical expertise, and solving impactful challenges alongside talented teammates who value ownership, continuous learning, and growth.

Total Rewards

At Samsung - SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $180,200 and $297,200. Your actualbase pay will depend on variables that may includeyour educationskills, qualifications, experience, and worklocation.

Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.

Additionally, this role might be eligible to participate in long term incentive plan and relocation.

This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Trade Secrets

By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.

#SARC #ACL

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