Senior Physical Verification Engineer
$91K - $125K/yr
Implement Physical Verification DRC/LVS/PERC rule decks. * Support and enhance design verification flow. * Create project specifications and requirements in cooperation with engineering teams
$91K - $125K/yr
Implement Physical Verification DRC/LVS/PERC rule decks. * Support and enhance design verification flow. * Create project specifications and requirements in cooperation with engineering teams
$91K - $125K/yr
Implement Physical Verification DRC/LVS/PERC rule decks. * Support and enhance design verification flow. * Create project specifications and requirements in cooperation with engineering teams
Beaverton, OR · On-site
$143K - $147K/yr
SoC Physical Design Verification Engineer At Apple, we work every single day to craft products that ... Experienced with physical verification flows such as DRC/LVS/ANT/HVDRC signoff flows and full-chip ...
Beaverton, OR · On-site
$143K - $147K/yr
SoC Physical Design Verification Engineer At Apple, we work every single day to craft products that ... Experienced with physical verification flows such as DRC/LVS/ANT/HVDRC signoff flows and full-chip ...
$94K - $129K/yr
Implement Physical Verification DRC/LVS/PERC rule decks. * Support and enhance design verification flow. * Create project specifications and requirements in cooperation with engineering teams
$94K - $129K/yr
Implement Physical Verification DRC/LVS/PERC rule decks. * Support and enhance design verification flow. * Create project specifications and requirements in cooperation with engineering teams
$97K - $205K/yr
As a Physical Verification Engineer, you will be a key technical contributor within the ... This role combines full‑chip physical verification ownership -- including DRC, LVS, ERC, and DFM ...
$97K - $205K/yr
As a Physical Verification Engineer, you will be a key technical contributor within the ... This role combines full‑chip physical verification ownership -- including DRC, LVS, ERC, and DFM ...
Greensboro, NC · On-site
$101K - $139K/yr
Implement Physical Verification DRC/LVS/PERC rule decks. * Support and enhance design verification flow. * Create project specifications and requirements in cooperation with engineering teams
Greensboro, NC · On-site
$101K - $139K/yr
Implement Physical Verification DRC/LVS/PERC rule decks. * Support and enhance design verification flow. * Create project specifications and requirements in cooperation with engineering teams
Folsom, CA · On-site
$97K - $205K/yr
As a Physical Verification Engineer, you will be a key technical contributor within the ... This role combines full‑chip physical verification ownership -- including DRC, LVS, ERC, and DFM ...
Folsom, CA · On-site
$97K - $205K/yr
As a Physical Verification Engineer, you will be a key technical contributor within the ... This role combines full‑chip physical verification ownership -- including DRC, LVS, ERC, and DFM ...
Senior Physical Verification Engineer Experience Level: Professional Job Type: Regular Location ... Experience with high performance RF IC and/or module design verification, including DRC, LVS and ...
Senior Physical Verification Engineer Experience Level: Professional Job Type: Regular Location ... Experience with high performance RF IC and/or module design verification, including DRC, LVS and ...
Austin, TX · On-site
$134K - $138K/yr
Description As a GPU Physical Verification engineer, you will work closely with the Physical Design ... Base/Metal DRC, ERC, LVS, Process ANT, PERC, and ESD. Experience with P&R flows and Physical ...
Austin, TX · On-site
$134K - $138K/yr
Description As a GPU Physical Verification engineer, you will work closely with the Physical Design ... Base/Metal DRC, ERC, LVS, Process ANT, PERC, and ESD. Experience with P&R flows and Physical ...
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
... Engineer, you will be the technical owner of all signoff physical verification activities across advanced process nodes. You will lead DRC, LVS, and DFM sign-off at chip top level, drive hierarchical ...
... Engineer, you will be the technical owner of all signoff physical verification activities across advanced process nodes. You will lead DRC, LVS, and DFM sign-off at chip top level, drive hierarchical ...
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$165K - $260K/yr
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$165K - $260K/yr
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$160K - $225K/yr
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) We are seeking a motivated ... Own and execute full‑chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$160K - $225K/yr
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) We are seeking a motivated ... Own and execute full‑chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$165K - $260K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$165K - $260K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Santa Clara, CA · On-site
$158K - $163K/yr
GPU Physical Verification Design Engineer Do you love creating elegant solutions to highly complex ... Base/Metal DRC, ERC, LVS, Process ANT, PERC, and ESD. * Experience with P&R flows and Physical ...
Santa Clara, CA · On-site
$158K - $163K/yr
GPU Physical Verification Design Engineer Do you love creating elegant solutions to highly complex ... Base/Metal DRC, ERC, LVS, Process ANT, PERC, and ESD. * Experience with P&R flows and Physical ...
Palo Alto, CA · On-site
$175K - $280K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Palo Alto, CA · On-site
$175K - $280K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$165K - $260K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Irvine, CA · On-site
$165K - $260K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Palo Alto, CA · On-site
$175K - $280K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Palo Alto, CA · On-site
$175K - $280K/yr
... FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools ...
Austin, TX · On-site
$100K - $500K/yr
You'll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard ... A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout ...
Austin, TX · On-site
$100K - $500K/yr
You'll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard ... A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout ...
$95K - $99.2K
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$99.2K - $103.5K
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$103.5K - $107.7K
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$107.7K - $111.9K
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$111.9K - $116.1K
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$124.6K - $128.8K
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$128.8K - $133K
1% of jobs
$135.4K is the 25th percentile. Wages below this are outliers.
$133K - $137.3K
43% of jobs
The median wage is $137.7K / yr.
$137.3K - $141.5K
56% of jobs
$95K
$141.5K
| Aspect | Lvs Physical Verification Engineer | Physical Design Engineer |
|---|---|---|
| Primary Role | Verifies physical layouts for LVS (Layout vs. Schematic) compliance | Designs and implements physical chip layouts |
| Skills & Certifications | Knowledge of LVS tools, verification processes, EDA tools | Experience with physical design tools, STA, DRC/LVS checks |
| Work Environment | IC design verification teams, EDA tool usage | Physical implementation teams, chip layout design |
| Industry Usage | Common in semiconductor verification workflows | Common in chip design and physical implementation |
While both roles are integral to IC design, the Lvs Physical Verification Engineer focuses on verifying that physical layouts match schematic designs, ensuring LVS compliance. In contrast, the Physical Design Engineer is responsible for creating and optimizing the physical layout itself. Both roles require familiarity with EDA tools and semiconductor industry standards, but they serve different stages in the chip development process.
For Lvs Physical Verification Engineer jobs, the most frequently searched job titles are:

Apopka, FL
$91K - $125K/yr
Full-time
Re-posted yesterday
8.3
Based on 21 frontline employees who took The Breakroom Quiz
Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.
Qorvo is All Around You! We manufacture innovative RF solutions at the center of connectivity to enable high-performance applications for advanced wireless devices, wired and wireless networks and defense radar and communications for 5G networks, cloud computing, the Internet of Things, and other emerging applications. Our people are always at the core of Qorvo's innovation. Qorvo is a place to stretch your imagination and push boundaries to achieve success.
The successful candidate will join a team of EDA/DRC engineers enabling design verification used in the design flow for RF-ICs, acoustic wave filters, and modules. The position will involve development and maintenance of custom utilities, quality assurance and construction of Physical Verification decks, and providing design verification services.
Responsibilities:
Required Qualifications:
Preferred Qualifications:
Locations:
We are open to this position sitting out of our Richardson TX, Greensboro NC, or Apopka FL offices.
This position requires access to ITAR/EAR technologies. Applicant must be a US Person (US citizen, permanent resident, asylee, or refugee) or eligible to obtain necessary export authorizations.
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MAKE A DIFFERENCE AT QORVO
We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets - we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.
We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.
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Manufacturing
5,001 - 10,000 Employees
Greensboro, NC, US
1957