Brea, CA · On-site
C,C++,QT,QML, Qt Creator, Qt Quick framework, RTOS, CAN, SPI, I2C, UART, ARINC 429, control systems, Git, In Flight Entertainment, GDB, JTAG, Logic Analyzers * Experience: 6 to 15 Years * Good Design ...
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Brea, CA · On-site
C,C++,QT,QML, Qt Creator, Qt Quick framework, RTOS, CAN, SPI, I2C, UART, ARINC 429, control systems, Git, In Flight Entertainment, GDB, JTAG, Logic Analyzers * Experience: 6 to 15 Years * Good Design ...
San Jose, CA · On-site
$194K/yr
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation , along with the ability to lead cross ...
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San Jose, CA · On-site
$194K/yr
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation , along with the ability to lead cross ...
JTAG * GDB * Embedded debugging tools * Develop and maintain device drivers for peripheral interfaces such as UART, SPI, and I2C. * Collaborate with cross-functional engineering teams to resolve ...
JTAG * GDB * Embedded debugging tools * Develop and maintain device drivers for peripheral interfaces such as UART, SPI, and I2C. * Collaborate with cross-functional engineering teams to resolve ...
Morrisville, NC · On-site
$60 - $64/hr
Proven ability to troubleshoot and debug digital interfaces (e.g., JTAG)
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Morrisville, NC · On-site
$60 - $64/hr
Proven ability to troubleshoot and debug digital interfaces (e.g., JTAG)
San Jose, CA · On-site
$159K - $296K/yr
JTAG insertion and connectivity * High-speed analog/mixed signal IP integration * Execute DFT verification, debug, and DFT DRC closure * Identify, debug, and resolve DFT rule violations at both block ...
San Jose, CA · On-site
$159K - $296K/yr
JTAG insertion and connectivity * High-speed analog/mixed signal IP integration * Execute DFT verification, debug, and DFT DRC closure * Identify, debug, and resolve DFT rule violations at both block ...
San Jose, CA · On-site
JTAG and HS Analog/mixed signal IP IOBIST integration * ATPG pattern generation and coverage analysis * Proven ability to resolve DFT DRCs, connectivity issues, and testability problems * Strong TCL ...
San Jose, CA · On-site
JTAG and HS Analog/mixed signal IP IOBIST integration * ATPG pattern generation and coverage analysis * Proven ability to resolve DFT DRCs, connectivity issues, and testability problems * Strong TCL ...
Develop and integrate Scan Compression, MBIST, LBIST, JTAG, and IJTAG solutions. * Perform ATPG, fault simulation, and test coverage analysis. * Support silicon bring-up, debug, characterization, and ...
Develop and integrate Scan Compression, MBIST, LBIST, JTAG, and IJTAG solutions. * Perform ATPG, fault simulation, and test coverage analysis. * Support silicon bring-up, debug, characterization, and ...
San Jose, CA · On-site +1
$192K/yr
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
San Jose, CA · On-site +1
$192K/yr
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
Proficiency in debugging embedded software systems and familiarity with JTAG and ETM Trace tools. Proficient in Python and shell scripting. Excellent problem-solving and analytical thinking skills.
Proficiency in debugging embedded software systems and familiarity with JTAG and ETM Trace tools. Proficient in Python and shell scripting. Excellent problem-solving and analytical thinking skills.
Skilled in debugging embedded software systems and familiarity with JTAG and ETM Trace tools. Skilled in Python and shell scripting. Good problem-solving and analytical thinking skills. Preferred ...
Skilled in debugging embedded software systems and familiarity with JTAG and ETM Trace tools. Skilled in Python and shell scripting. Good problem-solving and analytical thinking skills. Preferred ...
Mountain View, CA · On-site
$155K - $204K/yr
Debug and troubleshoot embedded systems using tools such as GDB, JTAG, and logic analyzers. * Participate in customer engagements to gather requirements and usability criteria. Qualifications * BS ...
Mountain View, CA · On-site
$155K - $204K/yr
Debug and troubleshoot embedded systems using tools such as GDB, JTAG, and logic analyzers. * Participate in customer engagements to gather requirements and usability criteria. Qualifications * BS ...
$142K - $187K/yr
Debug and troubleshoot embedded systems using tools such as GDB, JTAG, and logic analyzers. * Participate in customer engagements to gather requirements and usability criteria. Qualifications * BS ...
$142K - $187K/yr
Debug and troubleshoot embedded systems using tools such as GDB, JTAG, and logic analyzers. * Participate in customer engagements to gather requirements and usability criteria. Qualifications * BS ...
Santa Clarita, CA · On-site
Experience with MBIST repair, IJTAG (IEEE 1687), JTAG, Boundary Scan, High-Speed IO verification, and DFT verification is highly preferred. The candidate should have a solid understanding of digital ...
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Santa Clarita, CA · On-site
Experience with MBIST repair, IJTAG (IEEE 1687), JTAG, Boundary Scan, High-Speed IO verification, and DFT verification is highly preferred. The candidate should have a solid understanding of digital ...
Plano, TX · Remote
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
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Plano, TX · Remote
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
Generate and port IJTAG ICL/PDL and STIL patterns for MBIST, ATPG, and JTAG tests * ATPG pattern verification on pre/post-route gate-level netlist including 0-delay and SDF * Work with backend team ...
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Generate and port IJTAG ICL/PDL and STIL patterns for MBIST, ATPG, and JTAG tests * ATPG pattern verification on pre/post-route gate-level netlist including 0-delay and SDF * Work with backend team ...
Santa Clara, CA · On-site
$143K - $189K/yr
... JTAG) and object file formats (ELF, COFF). • Collaborate with internal engineering teams to understand their needs and iterate on tooling, with a path toward external customer-facing tools.
Santa Clara, CA · On-site
$143K - $189K/yr
... JTAG) and object file formats (ELF, COFF). • Collaborate with internal engineering teams to understand their needs and iterate on tooling, with a path toward external customer-facing tools.
Los Angeles, CA · On-site
Common I/O protocols (I2C, SPI, JTAG, RS-232, RS-422, RS-485, Arinc 429, MIL-STD-1553, etc.) * Solid foundation of LabView expertise * High level of experience with hands-on troubleshooting and turn ...
Los Angeles, CA · On-site
Common I/O protocols (I2C, SPI, JTAG, RS-232, RS-422, RS-485, Arinc 429, MIL-STD-1553, etc.) * Solid foundation of LabView expertise * High level of experience with hands-on troubleshooting and turn ...
San Jose, CA · On-site
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
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San Jose, CA · On-site
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
Plano, TX · Remote
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
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Plano, TX · Remote
This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross ...
Support JTAG TAP controller integration and implementation across SoC designs, ensuring IEEE 1149.1 compliance and proper JTAG signal connectivity in collaboration with the DFT team. * Collaborate ...
Support JTAG TAP controller integration and implementation across SoC designs, ensuring IEEE 1149.1 compliance and proper JTAG signal connectivity in collaboration with the DFT team. * Collaborate ...
$33.17 - $44.21
4% of jobs
$44.21 - $55.24
6% of jobs
$55.24 - $66.28
14% of jobs
$66.66 is the 25th percentile. Wages below this are outliers.
$66.28 - $77.32
23% of jobs
The median wage is $78.52 / hr.
$77.32 - $88.35
24% of jobs
$91.34 is the 75th percentile. Wages above this are outliers.
$88.35 - $99.39
13% of jobs
$99.39 - $110.42
3% of jobs
$110.42 - $121.46
5% of jobs
$121.46 - $132.50
3% of jobs
$132.50 - $143.53
1% of jobs
$143.53 - $154.57
3% of jobs
$33
$85
$154
| Aspect | Jtag | Test Technician |
|---|---|---|
| Required Credentials | Typically certifications in electronics or hardware testing, some may have JTAG-specific training | Often holds certifications in electronics, testing, or quality assurance |
| Work Environment | Hardware development labs, manufacturing facilities, electronics testing environments | Manufacturing plants, quality control labs, electronics assembly lines |
| Industry Usage | Used for debugging, programming, and testing hardware via JTAG interface | Performs testing, troubleshooting, and quality checks on electronic products |
Jtag specialists focus on hardware testing and debugging using JTAG interfaces, while Test Technicians perform broader testing and quality assurance tasks. Both roles require electronics knowledge, but Jtag roles are more specialized in hardware debugging techniques.
Job Description
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