ASD is looking for an Engineer - CAD CAM 3 to support our Launch Vehicles (LV) Avionics Design ... SERDES, DDR3/DDR4, etc); · Experience with rigid-flex assemblies; · Ability to prepare artwork ...
ASD is looking for an Engineer - CAD CAM 3 to support our Launch Vehicles (LV) Avionics Design ... SERDES, DDR3/DDR4, etc); · Experience with rigid-flex assemblies; · Ability to prepare artwork ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$105.65K - $149.15K/yr
As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of ... experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Analog Design- Internship
Tempe, AZ · On-site
Analog Design Intern (Summer & Fall 2026) Location: Alphacore HQ | Internship Type: Full-time, Paid ... engineering team Qualifications: • Pursuing BS or MS in Electrical Engineering • Coursework in ...
Overview We are seeking a full-time Human Factors Design Engineer in our Chandler, AZ location. In ... Mentor and/or provide training to less-experienced Human Factors Design team members and interns ...
Overview We are seeking a full-time Human Factors Design Engineer in our Chandler, AZ location. In ... Mentor and/or provide training to less-experienced Human Factors Design team members and interns ...
At RTX, our internships, co-ops and full-time careers provide an exceptional foundation to work on ... As a Tool Design Engineer you'll use computer aided design to generate 3-dimensional models and ...
At RTX, our internships, co-ops and full-time careers provide an exceptional foundation to work on ... As a Tool Design Engineer you'll use computer aided design to generate 3-dimensional models and ...
Design, document, and develop ASIC packages for high-volume, high-quality release, including post ... Deep expertise in 56G PAM4 and above, high-speed SerDes architectures, channel modeling, BER ...
Design, document, and develop ASIC packages for high-volume, high-quality release, including post ... Deep expertise in 56G PAM4 and above, high-speed SerDes architectures, channel modeling, BER ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
Phoenix, AZ · On-site
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
SOC Physical Design Static Timing Analysis Engineer
$164.47K - $311.89K/yr
As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance ... internship experiences and or schoolwork/classes/research. Minimum Qualifications * Bachelor ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or STEM ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Mechanical Engineer II (Onsite)
$75.50K - $102.30K/yr
Experience using Computer Aided Design (CAD) software, such as CREO or equivalent * Prior engineering project experience or have completed an internship demonstrating practical application of ...
Mechanical Engineer II (Onsite)
$75.50K - $102.30K/yr
Experience using Computer Aided Design (CAD) software, such as CREO or equivalent * Prior engineering project experience or have completed an internship demonstrating practical application of ...
Hardware Engineer (Space)
Tempe, AZ · On-site
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
Tempe, AZ · On-site
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
The ideal candidate will serve as a critical technical bridge between our design teams, customers ... SerDes, etc.) Knowledge of IC packaging, thermal management, and power delivery considerations ...
The ideal candidate will serve as a critical technical bridge between our design teams, customers ... SerDes, etc.) Knowledge of IC packaging, thermal management, and power delivery considerations ...
Hardware Engineer (Space)
Tempe, AZ · On-site
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Hardware Engineer (Space)
Tempe, AZ · On-site
$164.50K - $246.50K/yr
You will lead a multidisciplinary engineering team through the full hardware development lifecycle ... Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI * Perform HyperLynx ...
Internship Serdes Design Engineer information
See Tempe, AZ salary details
$8.75 - $11.16
9% of jobs
$11.16 - $13.56
8% of jobs
$14.19 is the 25th percentile. Wages below this are outliers.
$13.56 - $15.97
28% of jobs
The median wage is $16.61 / hr.
$15.97 - $18.38
16% of jobs
$20.02 is the 75th percentile. Wages above this are outliers.
$18.38 - $20.78
20% of jobs
$20.78 - $23.19
9% of jobs
$23.19 - $25.60
4% of jobs
$25.60 - $28
1% of jobs
$28 - $30.41
1% of jobs
$30.41 - $32.82
1% of jobs
$32.82 - $35.23
2% of jobs
$8
$18
$35
How much do internship serdes design engineer jobs pay per hour?
As of May 28, 2026, the average hourly pay for internship serdes design engineer in Tempe, AZ is $18.56, according to ZipRecruiter salary data. Most workers in this role earn between $13.80 and $20.72 per hour, depending on experience, location, and employer.
What are the key skills and qualifications needed to thrive as an Internship Serdes Design Engineer, and why are they important?
To thrive as an Internship Serdes Design Engineer, you need a solid background in electrical engineering principles, digital and analog circuit design, and familiarity with SerDes architectures, typically gained through coursework or related experience. Knowledge of simulation tools (such as Cadence, HSPICE, or MATLAB), and experience with hardware description languages like Verilog or VHDL are commonly expected. Strong problem-solving skills, attention to detail, and effective communication help interns excel in collaborative and fast-paced project environments. Mastery of these skills is crucial for supporting high-speed interface design, ensuring signal integrity, and contributing effectively to engineering teams.
What types of projects and responsibilities can I expect as an Internship Serdes Design Engineer?
As an Internship Serdes Design Engineer, you can expect to work on tasks such as assisting in the design and simulation of high-speed serial interfaces, supporting validation and debugging efforts, and collaborating with senior engineers to optimize signal integrity. You may be involved in lab measurements, data analysis, and documentation of design processes. Interns typically participate in team meetings and contribute to the development of test benches or verification environments, providing a valuable opportunity to gain hands-on experience in both digital and analog design aspects within a collaborative engineering team.
What does an Internship Serdes Design Engineer do?
An Internship Serdes (Serializer/Deserializer) Design Engineer assists in designing high-speed data transmission circuits that convert data between serial and parallel forms. They typically work under the guidance of experienced engineers to help develop, test, and optimize SerDes blocks used in integrated circuits for applications like networking, data centers, and consumer electronics. Tasks may include schematic design, simulation, layout, and validation of high-speed analog and mixed-signal circuits. The internship provides hands-on experience with industry-standard electronic design automation (EDA) tools and exposure to the full chip design flow.
What is the difference between Internship Serdes Design Engineer vs Serdes Design Engineer?
| Aspect | Internship Serdes Design Engineer | Serdes Design Engineer |
|---|---|---|
| Qualifications | Enrolled in or recent graduate in Electrical Engineering or related field | Bachelor's or Master's in Electrical Engineering, with experience preferred |
| Work Environment | Internship program, collaborative team, learning-focused | Full-time professional role, project-driven, independent responsibilities |
| Industry Usage | Entry-level, training, and development stage | Design, development, and testing of Serdes components in industry projects |
The Internship Serdes Design Engineer role is an entry-level position aimed at students or recent graduates gaining hands-on experience. In contrast, a Serdes Design Engineer is a full-time professional responsible for designing and developing high-speed serial transceivers. The internship provides foundational exposure, while the full engineer role involves independent project execution and advanced design tasks.
What are popular job titles related to Internship Serdes Design Engineer jobs in Tempe, AZ? For Internship Serdes Design Engineer jobs in Tempe, AZ, the most frequently searched job titles are:
What job categories do people searching Internship Serdes Design Engineer jobs in Tempe, AZ look for? The top searched job categories for Internship Serdes Design Engineer jobs in Tempe, AZ are:
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What cities near Tempe, AZ are hiring for Internship Serdes Design Engineer jobs? Cities near Tempe, AZ with the most Internship Serdes Design Engineer job openings:
Other
Posted 23 days ago
Job description
ASD is looking for an Engineer – CAD CAM 3 to support our Launch Vehicles (LV) Avionics Design Group (ADG). As a member of the ADG you’ll work in a fast-paced team environment alongside Design Engineers and Program Engineers to make our technologies a reality. This position will serve on-site at the Northrop Grumman facility in Chandler, AZ. Responsibilities: · Design/Layout printed wiring boards (PWBs) for military/aerospace avionics and test applications. · Communicate project status to your direct Manager and the Program Engineering Manager. · Collaborate with the circuit design engineer and mechanical engineers to ensure proper form, fit, and function of the design. · Participate in Peer Reviews and Design Milestone reviews throughout the development process Basic Qualifications for Engineer – CAD CAM 3: · Minimum 5 years recent PWB design layout experience using the Cadence Allegro design tool suite; · AA/AS degree or other 2-year post high school training with a minimum of 5 years of relevant experience; · Working knowledge of high density complex, multilayer boards (6-16 layers); · Experience in the layout/routing of digital and analog circuits, including power circuits; · Experience with layout/routing of high speed digital and controlled-impedance circuits (SERDES, DDR3/DDR4, etc); · Experience with rigid-flex assemblies; · Ability to prepare artwork (ODB++, Gerbers) for fabrication of PWBs; · Extensive experience with footprint/symbol creation and library management; · Understanding of IPC-2221 and IPC-7351 specifications; · Ability to acquire security clearance. · This position requires the applicant to be a U.S. citizen.
Candidates must have the ability to obtain and maintain a DoD Secret clearance per business requirements. Preferred Qualifications for Engineer – CAD CAM 3: · Working understanding of the Printed Wiring Assembly manufacturing process; · Experience with CAM350 and/or Valor DFM software tools; · Experience with OrCAD Layout and Mentor PADS or Xpedition tool suites;
Candidates must have the ability to obtain and maintain a DoD Secret clearance per business requirements. Preferred Qualifications for Engineer – CAD CAM 3: · Working understanding of the Printed Wiring Assembly manufacturing process; · Experience with CAM350 and/or Valor DFM software tools; · Experience with OrCAD Layout and Mentor PADS or Xpedition tool suites;