PD Intern
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
Quick apply
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
Quick apply
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
San Jose, CA · On-site
Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ... RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a ...
San Jose, CA · On-site
We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
San Jose, CA · On-site
We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
San Jose, CA · On-site
We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
Quick apply
San Jose, CA · On-site
We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and ... We are looking for Fall '26, Spring '27, and Summer '27 interns. You may be a good fit if you have
Pursuing Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL, Digital ... Willing to relocate to Phoenix Metro area (Arizona) for the full duration of internship, and ...
Pursuing Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL, Digital ... Willing to relocate to Phoenix Metro area (Arizona) for the full duration of internship, and ...
Pursuing Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL, Digital ... Willing to relocate to Phoenix Metro area (Arizona) for the full duration of internship, and ...
Pursuing Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL, Digital ... Willing to relocate to Phoenix Metro area (Arizona) for the full duration of internship, and ...
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... to design automation tools is a plus Internship will be based in San Jose location. Ideal ...
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... to design automation tools is a plus Internship will be based in San Jose location. Ideal ...
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... to design automation tools is a plus Internship will be based in San Jose location. Ideal ...
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... to design automation tools is a plus Internship will be based in San Jose location. Ideal ...
This is a paid internship for Fall - starting August 17 and going through December 11, 2026 ... Design Intern -- YOUR NAME" in the subject line. No phone calls, please.
This is a paid internship for Fall - starting August 17 and going through December 11, 2026 ... Design Intern -- YOUR NAME" in the subject line. No phone calls, please.
San Jose, CA · On-site
$35 - $62/hr
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... plus • Internship will be based in San Jose location. Ideal candidates should be from local ...
San Jose, CA · On-site
$35 - $62/hr
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... plus • Internship will be based in San Jose location. Ideal candidates should be from local ...
Trenton, NJ · On-site
Internship Overview TerraCycle is an environmentally friendly, highly publicized, fast-growth start ... Industrial Design Intern: Ideal interns are crafty, with a knack for seeing another persons' trash ...
Quick apply
Trenton, NJ · On-site
Internship Overview TerraCycle is an environmentally friendly, highly publicized, fast-growth start ... Industrial Design Intern: Ideal interns are crafty, with a knack for seeing another persons' trash ...
Description Internship Overview TerraCycle is an environmentally friendly, highly publicized, fast ... Industrial Design Intern: Ideal interns are crafty, with a knack for seeing another persons' trash ...
Description Internship Overview TerraCycle is an environmentally friendly, highly publicized, fast ... Industrial Design Intern: Ideal interns are crafty, with a knack for seeing another persons' trash ...
Trenton, NJ · On-site
Job Type Internship Description Internship Overview TerraCycle is an environmentally friendly ... Industrial Design Intern: Ideal interns are crafty, with a knack for seeing another persons' trash ...
Trenton, NJ · On-site
Job Type Internship Description Internship Overview TerraCycle is an environmentally friendly ... Industrial Design Intern: Ideal interns are crafty, with a knack for seeing another persons' trash ...
Albuquerque, NM · On-site
$12/hr
The work is expected to take 10 hours per week to meet the requirements of the internship. This ... The Graphic Design Intern will work under the supervision of the Keller Hall Production Manager ...
Albuquerque, NM · On-site
$12/hr
The work is expected to take 10 hours per week to meet the requirements of the internship. This ... The Graphic Design Intern will work under the supervision of the Keller Hall Production Manager ...
Calabasas, CA · On-site
$18.47/hr
Calabasas, CA (On-site) Internship: Part-Time or Full-Time We are looking for a passionate and creative Fashion Design Intern to join our Ready-to-Wear Design team. This is an exciting opportunity ...
Quick apply
Calabasas, CA · On-site
$18.47/hr
Calabasas, CA (On-site) Internship: Part-Time or Full-Time We are looking for a passionate and creative Fashion Design Intern to join our Ready-to-Wear Design team. This is an exciting opportunity ...
Albuquerque, NM · On-site +1
$14.50 - $19.50/hr
The Graphic Design Intern will help to create and edit visual assets for the UNM Department of ... The work is expected to take 10 hours per week to meet the requirements of the internship. This ...
Albuquerque, NM · On-site +1
$14.50 - $19.50/hr
The Graphic Design Intern will help to create and edit visual assets for the UNM Department of ... The work is expected to take 10 hours per week to meet the requirements of the internship. This ...
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... to design automation tools is a plus Internship will be based in San Jose location. Ideal ...
It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating ... to design automation tools is a plus Internship will be based in San Jose location. Ideal ...
Digital Design Intern Third Way is a national think tank and advocacy organization that champions ... Internship offers will be extended between August 17 and August 21, 2026.* *Please note all duties ...
Digital Design Intern Third Way is a national think tank and advocacy organization that champions ... Internship offers will be extended between August 17 and August 21, 2026.* *Please note all duties ...
FPGA Intern (Fall 2026) Internships at Astranis typically last for twelve weeks, and are hourly ... RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains
FPGA Intern (Fall 2026) Internships at Astranis typically last for twelve weeks, and are hourly ... RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains
$16.50 - $22/hr
... interns are asked to make a 3-6 month commitment (semester or quarter cycle) at 15-20 hours per ... GRAPHIC DESIGN INTERN" in the subject line, and please include a cover letter, resume and salary ...
$16.50 - $22/hr
... interns are asked to make a 3-6 month commitment (semester or quarter cycle) at 15-20 hours per ... GRAPHIC DESIGN INTERN" in the subject line, and please include a cover letter, resume and salary ...
$9.13 - $11.65
9% of jobs
$11.65 - $14.16
8% of jobs
$14.81 is the 25th percentile. Wages below this are outliers.
$14.16 - $16.67
28% of jobs
The median wage is $17.34 / hr.
$16.67 - $19.19
16% of jobs
$20.91 is the 75th percentile. Wages above this are outliers.
$19.19 - $21.70
20% of jobs
$21.70 - $24.21
9% of jobs
$24.21 - $26.73
4% of jobs
$26.73 - $29.24
1% of jobs
$29.24 - $31.75
1% of jobs
$31.75 - $34.27
1% of jobs
$34.27 - $36.78
2% of jobs
$9
$19
$36
| Aspect | Internship Rtl Design Intern | Digital IC Design Intern |
|---|---|---|
| Required Skills | Verilog/VHDL, basic digital design | Verilog/VHDL, digital circuit design, simulation |
| Work Environment | Design teams, hardware development labs | Design teams, hardware development labs |
| Industry Usage | Common in semiconductor and electronics companies | Common in semiconductor and electronics companies |
| Focus Area | RTL coding, simulation, verification | RTL coding, synthesis, timing analysis |
Both roles involve digital design and RTL coding, but the Internship Rtl Design Intern typically focuses on writing and verifying RTL code, while the Digital IC Design Intern may also involve synthesis and timing analysis. They share similar environments and industry usage, making them closely related internship options for aspiring hardware engineers.

Other
Re-posted 23 days ago
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
Familiarity with high-speed digital logic
Exposure to ASIC or SoC design concepts
Familiarity with SystemVerilog, UVM, or Python
Familiarity with verification work and writing test benches
Familiarity with physical design flows and tooling
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Familiarity with numerical representations and functions (RTL)
Familiarity with clocking and reset schemes (RTL/PD)
UVM or formal verification experience (DV)
Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.