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Internship Ic Layout Mask Designer Jobs in Oregon

Siemens AG

Senior Software Engineer

Wilsonville, OR · On-site

$110 - $198/hr

... team in the Siemens EDA IC segment. You will be part of a team responsible for designing ... layout analysis and simulation. Development responsibilities will span different software ...

Posted today

Ralliant

Hardware Design Engineer

Beaverton, OR · On-site

Internship or project experience involving hardware or PCB design. * Experience with schematic capture and PCB layout tools such as Siemens Xpedition, Altium Designer, Cadence Allegro, or similar.

Siemens

Senior Software Engineer

Wilsonville, OR · On-site

$126K - $167K/yr

... team in the Siemens EDA IC segment. You will be part of a team responsible for designing ... layout analysis and simulation. Development responsibilities will span different software ...

Ralliant

Hardware Design Engineer

Beaverton, OR · On-site

$64 - $119/hr

Internship or project experience involving hardware or PCB design. * Experience with schematic capture and PCB layout tools such as Siemens Xpedition, Altium Designer, Cadence Allegro, or similar.

Apple

SerDes Circuit Design Engineer

Beaverton, OR

$210K/yr

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...

Apple

SerDes Circuit Design Engineer

Beaverton, OR · On-site

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team ... IC development from definition to high-volume production including layout supervision, bench ...

Root Edge

Senior Mechanical Project Engineer

Portland, OR · On-site

$120 - $160/hr

... layout. * 3D & 2D Modeling: Create and maintain 3D models in SolidWorks and 2D drawings in AutoCAD ... Review and verify existing standard designs for accuracy, manufacturability, and continued ...

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Internship Ic Layout Mask Designer information

What does an internship IC layout mask designer do?

An Internship IC Layout Mask Designer assists in creating detailed layouts for integrated circuit (IC) chips using specialized design software. They work under the supervision of experienced engineers to translate circuit schematics into physical layouts, ensuring that all design rules and manufacturing requirements are met. Interns may also help with design checks, participate in design reviews, and learn about semiconductor manufacturing processes. This role provides hands-on experience in the microelectronics industry, helping interns develop technical and teamwork skills relevant to IC design.

What are the key skills and qualifications needed to thrive as an internship IC layout mask designer?

Success as an Internship IC Layout Mask Designer requires a foundation in electrical engineering or a related field, strong understanding of semiconductor physics, and basic knowledge of IC design principles. Familiarity with EDA tools such as Cadence Virtuoso or Synopsys, as well as an understanding of design rule checking (DRC) and layout versus schematic (LVS) verification, is highly valuable. Attention to detail, problem-solving ability, and effective communication skills help interns collaborate with senior designers and accurately implement complex layouts. These skills and qualities are essential to ensure precise, manufacturable designs that meet performance and reliability standards in the semiconductor industry.

What are some common challenges faced by internship IC layout mask designers, and how can they effectively overcome them?

As an IC Layout Mask Designer intern, you may encounter challenges such as learning specialized EDA (Electronic Design Automation) tools, understanding strict design rules, and interpreting complex circuit schematics. Collaborating closely with senior designers and asking clarifying questions can help you quickly get up to speed. Regularly reviewing layout guidelines, participating in team design reviews, and practicing with real-world design projects will also enhance your skills and confidence. Embracing feedback and staying organized are key to successfully managing the steep learning curve in this technical and detail-oriented role.

What is the difference between Internship Ic Layout Mask Designer vs IC Design Engineer?

AspectInternship Ic Layout Mask DesignerIC Design Engineer
CredentialsTypically pursuing or recent graduate in Electrical Engineering or related fieldBachelor's or Master's in Electrical Engineering, VLSI Design, or similar
Work EnvironmentDesign labs, CAD software, collaborative teamsDesign teams, simulation tools, project-based
Industry UsageFoundries, semiconductor companies, research labsSemiconductor companies, integrated circuit firms
Search & ComparisonOften compared for entry-level roles and trainingMore advanced, focused on full chip design

The Internship Ic Layout Mask Designer role focuses on creating physical layouts for semiconductor masks, often as an entry-level position. In contrast, an IC Design Engineer handles the entire chip design process, requiring more experience and advanced skills. Both roles are essential in the semiconductor industry but differ mainly in scope and experience level.

What are the most commonly searched types of Ic Layout Mask Designer jobs in Oregon?

The most popular types of Ic Layout Mask Designer jobs in Oregon are:

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For Internship Ic Layout Mask Designer jobs in Oregon, the most frequently searched job titles are:

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Cities in Oregon with the most Internship Ic Layout Mask Designer job openings:

Internship Ic Layout Mask Designer jobs near you
Infographic showing various Internship Ic Layout Mask Designer job openings in Oregon as of August 2026, with employment types broken down into 8% Internship, 58% Full Time, 32% Part Time, 1% Temporary, and 1% Contract. Highlights an 77% Physical, 2% Hybrid, and 21% Remote job distribution.

Senior Software Engineer

Siemens AG

Wilsonville, OR • On-site

$110 - $198/hr

Other

Posted 20 hours ago

Posted today

Job description

Job Family: Software

Req ID: 517692

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.

We are looking for a highly motivated software engineer to work on the Calibre engineering team in the Siemens EDA IC segment. You will be part of a team responsible for designing, developing, and supporting the Calibre Parasitic Extraction software. The Calibre parasitic extraction products identify the electrical side effects of devices and interconnect wires in integrated circuit designs and output those in a format that can be used for comprehensive post-layout analysis and simulation. Development responsibilities will span different software components including computation engines, application software, APIs, and utilities. You will collaborate with a senior group of software engineers on production level quality of new components and algorithms, and support existing parasitic extraction related products.

Minimum Job Qualifications:

  • MS or Ph.D. in Computer Science, Scientific Computing, Electrical Engineering, or related discipline

  • Excellent programming (C++) and software engineering skills

  • 2+ years EDA software development experience, ideally on parasitic extraction

  • Experience with large software development projects (code reviews, version management, unit tests, static/dynamic code checkers)

  • Practical (scientific) software development experience on projects that required numerical linear algebra and data structures/algorithms for high-volume data and computing

  • Strong team player with solid interpersonal and communication skills (written and verbal)

  • Strong ability and interest to learn, explore and apply new technologies in the domains of software engineering, computer science, and numerical mathematics

  • Strong analytical and problem-solving skills

  • Self-motivation, self-discipline, and the ability to set and work consistently towards personal goals

Preferred Job Qualifications:

  • Experience with multi-threaded, distributed, and high-performance computing would be a big plus

  • IC CAD experience (DRC, LVS, extraction, simulation) and solid knowledge of semiconductor processes would be a plus

  • Experience with UNIX and/or LINUX platforms is recommended

Why us?

Working at Siemens Software means flexibility - Choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software. A collection of over 377,000 minds building the future one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!

Siemens Software. Transform the Everyday with Us

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109,800 197,700 5-8

Organization: Digital Industries

Job Type: Full-time

Category: Research & Development

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