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Internship High Performance Computing Engineer Jobs in Irvine, CA

Product Manager, Edge AI & Video Solutions

Tustin, CA · On-site +1

$75K - $90K/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

In this role, you will collaborate closely with engineering, sales, supply chain, manufacturing ... high-performance computing platforms. We cooperate closely with our partners to help provide ...

Product Manager I

Tustin, CA · On-site

$75K - $90K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

In this role, you will collaborate closely with engineering, sales, supply chain, manufacturing ... high-performance computing platforms. We cooperate closely with our partners to help provide ...

IC Package Thermal Mechanical Engineer

Irvine, CA · On-site

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

... in high-performance computing (HPC), AI, and networking products. As an IC Package Engineer, you will leverage advanced multiphysics simulations to optimize reliability, ensure high product yield ...

Electronic Design Engineering, Senior

Newport Beach, CA · On-site

$107 - $139/hr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

... high performance computing, satellite communications, radar, unmanned aerial vehicles, medical ... Day to day support for designer and layout engineer issues * Support semiconductor process ...

Powertrain Performance Test Engineer

Chino, CA · On-site

$70K - $90K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Powertrain Performance Test Engineer As a powertrain performance test engineer you will be part of ... Engineering internship experience * Good understanding of vehicle powertrain systems and vehicle ...

Product Manager II, Custom Embedded Solutions

Irvine, CA · On-site

$90K - $110K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

In this role, you'll serve as the interface between customers and Advantech's engineering and ... high-performance computing platforms. We cooperate closely with our partners to help provide ...

RMA System Technician

Tustin, CA · On-site

$24 - $28/hr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Working closely with Engineering, Quality, and Customer Service teams, the RMA Systems Technician ... high-performance computing platforms. We cooperate closely with our partners to help provide ...

Sr Aerodynamics Engineer

Long Beach, CA · On-site

$132K - $198K/yr

Ideally, you have significant compressible flow, CFD, and high-performance computing (HPC ... Undergraduate degree in engineering or related field * 5+ years relevant experience * Demonstrated ...

Showing results 41-60

Internship High Performance Computing Engineer information

See Irvine, CA salary details

$11

$64

$105

How much do internship high performance computing engineer jobs pay per hour?

As of Aug 16, 2026, the average hourly pay for internship high performance computing engineer in Irvine, CA is $64.52, according to ZipRecruiter salary data. Most workers in this role earn between $52.88 and $73.03 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an internship high performance computing engineer?

To thrive as an Internship High Performance Computing Engineer, you need a solid background in computer science fundamentals, programming (especially in C/C++ or Python), and a familiarity with parallel computing concepts, often supported by coursework or relevant project experience. Experience with Linux environments, HPC clusters, and distributed computing frameworks, as well as tools like MPI, OpenMP, or Slurm, is commonly required. Strong problem-solving skills, attention to detail, and the ability to collaborate effectively within technical teams help interns stand out. These skills ensure you can efficiently support computational research, resolve technical challenges, and contribute meaningfully to HPC projects.

What is the difference between Internship High Performance Computing Engineer vs Internship Data Scientist?

AspectInternship High Performance Computing EngineerInternship Data Scientist
Required SkillsProgramming (C++, Python), parallel computing, HPC systemsStatistics, machine learning, data analysis, Python/R
Work EnvironmentResearch labs, tech companies, academia with focus on HPC systemsTech firms, finance, healthcare, research institutions
Industry UsageHigh-performance computing projects, scientific simulationsData analysis, predictive modeling, business insights

Internship High Performance Computing Engineers focus on developing and optimizing computational systems for large-scale scientific and engineering problems, requiring skills in parallel programming and HPC environments. In contrast, Internship Data Scientists analyze data to extract insights, using statistical and machine learning techniques. Both roles are valuable in tech and research sectors but differ in technical focus and daily tasks.

What is an internship high performance computing engineer?

An Internship High Performance Computing (HPC) Engineer is a student or early-career professional who works with advanced computing systems designed for processing large data sets and complex calculations at high speeds. During the internship, they assist in developing, optimizing, and maintaining HPC infrastructure, software, or applications used in scientific research, engineering, or data analysis. The role often involves learning about parallel computing, cluster management, and performance tuning, while gaining hands-on experience with cutting-edge technologies. Interns work under the supervision of experienced HPC engineers, contributing to projects that advance computational capabilities in various fields.

What types of projects can I expect to work on as an internship high performance computing engineer?

As an Internship High Performance Computing (HPC) Engineer, you will typically contribute to projects involving optimization of scientific applications, performance analysis, and cluster management. Interns often assist with benchmarking software, troubleshooting issues in parallel computing environments, and supporting researchers with technical solutions. You'll likely collaborate closely with senior HPC engineers, system administrators, and academic researchers to ensure efficient use of computing resources. This hands-on experience provides valuable insight into real-world challenges faced in HPC environments and helps build a strong foundation for future roles in the field.

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For Internship High Performance Computing Engineer jobs in Irvine, CA, the most frequently searched job titles are:

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Cities near Irvine, CA with the most Internship High Performance Computing Engineer job openings:

Infographic showing various Internship High Performance Computing Engineer job openings in Irvine, CA as of August 2026, with employment types broken down into 50% Internship, and 50% Full Time. Highlights an 100% In-person job distribution, with an average salary of $134,194 per year, or $64.5 per hour.

Principal Design Validation & Test (DVT) Engineer

Celero Communications, Inc.

Irvine, CA • On-site

Full-time

Posted 17 days ago


Job description

About The Role
Celero is seeking an experienced Principal Design Validation & Test (DVT) Engineer to lead post-silicon validation for next-generation coherent DSP ASICs powering AI and hyperscale optical networking. As a key member of our engineering team, you will play a critical role in enabling first silicon, driving silicon characterization, and ensuring product readiness for customer deployment and high-volume production.
This is a highly visible technical leadership role within a fast-paced startup where you will work closely with Architecture, RTL Design, Firmware, Systems, Product Engineering, and customers to solve complex silicon challenges. You will have the opportunity to influence validation strategy, define best practices, and help build our validation infrastructure from the ground up.
What You'll Do
  • Lead post-silicon validation and characterization of complex ASICs and SoCs from first silicon through production release.
  • Develop comprehensive validation plans covering functionality, performance, interoperability, compliance, stress testing, corner cases, and reliability.
  • Enable first silicon bring-up using JTAG, scan, embedded debug features, and board-level diagnostics.
  • Validate high-speed interfaces including PCIe, Ethernet, SerDes, CXL, SPI, I²C, MDIO, and other industry-standard protocols.
  • Utilize advanced lab equipment including high-bandwidth oscilloscopes, BERTs, protocol analyzers, Ethernet traffic generators, network analyzers, logic analyzers, and power measurement equipment.
  • Debug complex hardware, firmware, RTL, and system-level issues while working closely with cross-functional engineering teams to identify root cause and drive timely resolution.
  • Develop scalable Python-based automation frameworks for test execution, regression, silicon characterization, data analysis, and reporting.
  • Validate firmware, bootloaders, device drivers, and hardware/software interfaces across multiple platforms.
  • Characterize silicon performance, power, thermal behavior, margins, and compliance against architectural specifications.
  • Lead debug reviews and provide technical direction for validation methodology, infrastructure, and best practices.
  • Support early customer engagements by reproducing and resolving system-level issues and collaborating with applications engineering.
  • Document validation results, silicon characterization data, debug findings, and production readiness reports.

What You'll Bring
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • 8+ years of hands-on post-silicon validation, DVT, or silicon bring-up experience with complex ASICs or SoCs.
  • Proven experience bringing first silicon to production in networking, communications, data center, AI, or high-performance computing products.
  • Strong understanding of silicon debug methodologies and structured root-cause analysis.
  • Extensive experience using laboratory equipment including oscilloscopes, BERTs, protocol analyzers, network analyzers, logic analyzers, and related validation tools.
  • Strong knowledge of one or more high-speed protocols including PCIe, Ethernet, SerDes, CXL, USB, SPI, I²C, or similar interfaces.
  • Strong Python programming skills for automation, regression development, and data analysis.
  • Experience validating firmware, embedded software, drivers, and hardware/software interfaces.
  • Ability to interpret schematics, understand board design, power sequencing, signal integrity, and hardware debug.
  • Excellent communication skills with the ability to work effectively across Architecture, Design, Firmware, Systems, Product Engineering, Manufacturing, and Customer Engineering teams.
  • Comfortable working in a fast-paced startup environment where priorities evolve quickly and every team member has significant technical ownership.
  • Ability to work onsite at our Irvine, California headquarters.

Preferred Qualifications
  • Experience validating coherent optical DSPs, networking ASICs, Ethernet switch silicon, AI accelerators, GPUs, storage controllers, or high-speed communications devices.
  • Strong knowledge of Ethernet, PCIe, OIF, IEEE, or related compliance specifications.
  • Experience with PIPE, PCS, PMA, MAC, PHY, or other physical and protocol layers of high-speed interfaces.
  • Experience building scalable validation automation, regression systems, dashboards, and data pipelines.
  • Familiarity with customer platform validation and hyperscale qualification processes.
  • Experience mentoring engineers and leading technical initiatives across multiple engineering disciplines.

Why Celero
At Celero, you'll help develop the next generation of coherent DSP technology enabling AI infrastructure and hyperscale networking. As a Principal Engineer, you'll have the opportunity to influence product architecture, shape validation strategy, work alongside industry leaders, and make a significant impact within a collaborative, high-growth startup environment where innovation, ownership, and technical excellence are valued every day