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Internship High Performance Computing Engineer Jobs in Irvine, CA

Marvell

Senior Principal Test Engineer

Irvine, CA · On-site

$134K - $185K/yr

... high-performance computing (HPC) chipsets. The individual is charged to work with cross functional ... every stage - from internship to retirement and through life's most important moments. Our ...

Advantech

Product Manager I

Tustin, CA · On-site

$75K - $90K/yr

In this role, you will collaborate closely with engineering, sales, supply chain, manufacturing ... high-performance computing platforms. We cooperate closely with our partners to help provide ...

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Internship High Performance Computing Engineer information

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How much do internship high performance computing engineer jobs pay per hour?

As of Aug 11, 2026, the average hourly pay for internship high performance computing engineer in Irvine, CA is $64.52, according to ZipRecruiter salary data. Most workers in this role earn between $52.88 and $73.03 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an internship high performance computing engineer?

To thrive as an Internship High Performance Computing Engineer, you need a solid background in computer science fundamentals, programming (especially in C/C++ or Python), and a familiarity with parallel computing concepts, often supported by coursework or relevant project experience. Experience with Linux environments, HPC clusters, and distributed computing frameworks, as well as tools like MPI, OpenMP, or Slurm, is commonly required. Strong problem-solving skills, attention to detail, and the ability to collaborate effectively within technical teams help interns stand out. These skills ensure you can efficiently support computational research, resolve technical challenges, and contribute meaningfully to HPC projects.

What is the difference between Internship High Performance Computing Engineer vs Internship Data Scientist?

AspectInternship High Performance Computing EngineerInternship Data Scientist
Required SkillsProgramming (C++, Python), parallel computing, HPC systemsStatistics, machine learning, data analysis, Python/R
Work EnvironmentResearch labs, tech companies, academia with focus on HPC systemsTech firms, finance, healthcare, research institutions
Industry UsageHigh-performance computing projects, scientific simulationsData analysis, predictive modeling, business insights

Internship High Performance Computing Engineers focus on developing and optimizing computational systems for large-scale scientific and engineering problems, requiring skills in parallel programming and HPC environments. In contrast, Internship Data Scientists analyze data to extract insights, using statistical and machine learning techniques. Both roles are valuable in tech and research sectors but differ in technical focus and daily tasks.

What is an internship high performance computing engineer?

An Internship High Performance Computing (HPC) Engineer is a student or early-career professional who works with advanced computing systems designed for processing large data sets and complex calculations at high speeds. During the internship, they assist in developing, optimizing, and maintaining HPC infrastructure, software, or applications used in scientific research, engineering, or data analysis. The role often involves learning about parallel computing, cluster management, and performance tuning, while gaining hands-on experience with cutting-edge technologies. Interns work under the supervision of experienced HPC engineers, contributing to projects that advance computational capabilities in various fields.

What types of projects can I expect to work on as an internship high performance computing engineer?

As an Internship High Performance Computing (HPC) Engineer, you will typically contribute to projects involving optimization of scientific applications, performance analysis, and cluster management. Interns often assist with benchmarking software, troubleshooting issues in parallel computing environments, and supporting researchers with technical solutions. You'll likely collaborate closely with senior HPC engineers, system administrators, and academic researchers to ensure efficient use of computing resources. This hands-on experience provides valuable insight into real-world challenges faced in HPC environments and helps build a strong foundation for future roles in the field.
What are popular job titles related to Internship High Performance Computing Engineer jobs in Irvine, CA? For Internship High Performance Computing Engineer jobs in Irvine, CA, the most frequently searched job titles are:
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Internship High Performance Computing Engineer jobs near you
Infographic showing various Internship High Performance Computing Engineer job openings in Irvine, CA as of August 2026, with employment types broken down into 50% Internship, and 50% Full Time. Highlights an 100% In-person job distribution, with an average salary of $134,194 per year, or $64.5 per hour.

Senior Principal Test Engineer

Marvell Technology, Inc.

Irvine, CA • On-site

$134K - $185K/yr

Full-time

Life, Retirement

Re-posted 15 days ago

Job description

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell is seeking a highly talented Senior Principal Test Engineer to lead New Product Introduction (NPI) of Marvell Packaged Integrated Voltage Regulator (PIVR) powering next-generation high-performance computing (HPC) chipsets. The individual is charged to work with cross functional teams to develop electrical testing of Marvell's PIVR products, designing test hardware with thermal and mechanical considerations. In doing so, establishes standardized processes and methodologies that can be leveraged across Operations Engineering Team.
Idea candidate should have hardware knowledge including load board and socket design for High Power Products. Ability to collaborate with internal teams and partners in developing new hardware. Knowledgeable and experience dissecting any proposed hardware solution. Solid understand and hands-on experience developing test solution for Integrated Voltage Regulator (IVR) or Power Management Integrated IC (PMIC) on state of the art ATE Test Systems.
What You Can Expect
Test Lead - Pre-Silicon & Post-Silicon Validation
  • Lead test program development in coordination with Program Management (PGM) and post-silicon teams, aligning key milestones to support successful New Product Introduction (NPI) deployment.
  • Responsible for overseeing all aspects of test development across both pre-silicon and post-silicon phases.
  • Collaborate with cross-functional teams to define and develop comprehensive test plans.
  • Drive ATE hardware design, including design initiation, review, and approval prior to manufacturing sign-off.
  • Develop and implement test solutions for Integrated Voltage Regulator (IVR) and Packaged Integrated Voltage Regulator (PIVR) including production test program and test hardware.

What We're Looking For
Core Qualifications & Technical Expertise
  • 15+ years of Test Engineer experience with focus on New Product Introduction (NPI), developing and releasing ATE test solutions enabling High Volume Manufacturing (HVM) ramp
  • Proven leadership experience with 5+ years leading teams and driving test development initiatives
  • Strong knowledge and hands-on experience in PMIC (Power Management IC) testing
  • Proven collaboration with firmware teams to develop and implement ATE firmware solutions
  • Experience utilizing pattern translation tools to convert DFT (Design-for-Test) patterns into ATE-compatible test formats
  • Solid understanding of ATE hardware design processes and key components.
  • In-depth knowledge of Advantest V93000 (93K) hardware and software platforms
  • Advanced programming skills in Java, C/C++, and Python within ATE environments
  • Strong understanding of communication protocols, including debugging and validation
  • Well versed in the use of subversion control such as SVN or Git for test program development and released.

Bonus Qualifications
  • Experience with IVR (Integrated Voltage Regulator) and photonic products, including testing methodologies and application knowledge.
  • Solid understanding of RF/microwave principles, including signal integrity and the impact of mechanical factors on performance.
  • Expert-level experience (preferred) with automated test platforms such as: Advantest V93000 (SmarTest8) and Teradyne UltraFLEX (IG-XL)
  • Hands-on experience with thermal characterization and testing, including an understanding of thermal effects on device performance.

Expected Base Pay Range (USD)
162,000 - 239,760, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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