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Internship Asic Rtl Design Engineer Jobs in Atlanta, GA

Falcomm

ASIC Engineer

Atlanta, GA

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Cypress HCM

Senior Design Engineer (PMIC)

Suwanee, GA · On-site

$150K - $200K/yr

Senior Design Engineer - Mixed-Signal (PMIC) Location: Suwanee, GA 30024 | Reporting To: Sr. ... Designing/writing microarchitecture and RTL coding using System Verilog * Implementing fine-grain ...

Universal Avionics

FPGA Logic Design Manager

Duluth, GA · On-site

$119K - $153K/yr

Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.

Cypress HCM

Senior Analog Design Engineer

Suwanee, GA · On-site

$140K - $180K/yr

Senior Design Engineer - Analog Location: Suwanee, GA 30024 | Reporting To: Sr. Director ... Experience with Verilog RTL coding, including synchronous and asynchronous machines * Experience ...

USG, Inc.

Electrical Design Engineer

Atlanta, GA · On-site

Electrical Design Engineer Atlanta, Georgia & Skill Requirement: Responsibilities * Develop ... Engineering internships and Co-op assignments may be applied to experience requirements. * Must ...

Prolim Global

Electrical Design Engineer

Atlanta, GA · On-site

Prolim is hiring for a Electrical Design Engineer for a leading client Responsibilities * Develop ... Engineering internships and Co-op assignments may be applied to experience requirements. * Must ...

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All JobsAsic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer JobsInternship Asic Rtl Design Engineer Jobs in Atlanta, GA

Internship Asic Rtl Design Engineer information

See Atlanta, GA salary details

$90.4K

$144.4K

$194.3K

How much do internship asic rtl design engineer jobs pay per year?

As of Aug 31, 2026, the average yearly pay for internship asic rtl design engineer in Atlanta, GA is $144,437.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,500.00 and $173,100.00 per year, depending on experience, location, and employer.

What is an internship ASIC RTL design engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What does an internship ASIC RTL design engineer do?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What are the key skills and qualifications needed to thrive as an internship ASIC RTL design engineer?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Atlanta, GA?

The most popular types of Asic Rtl Design Engineer jobs in Atlanta, GA are:

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For Internship Asic Rtl Design Engineer jobs in Atlanta, GA, the most frequently searched job titles are:

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Internship Asic Rtl Design Engineer jobs near you
Infographic showing various Internship Asic Rtl Design Engineer job openings in Atlanta, GA as of August 2026, with employment types broken down into 52% Full Time, 10% Part Time, and 38% Contract. Highlights an 100% In-person job distribution, with an average salary of $144,437 per year, or $69.4 per hour.

ASIC Engineer

Falcomm

Atlanta, GA

$159K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 23 days ago

Job description

Are you passionate about building advanced semiconductor systems that power next-generation wireless technologies? At Falcomm, we are transforming innovative semiconductor research into real-world products through energy-efficient RF power amplifier and wireless solutions. Our mission is to push the boundaries of performance, efficiency, and integration in modern communication systems.

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital integrated circuits that interface with our RF technologies. This role will contribute to the design, implementation, and verification of ASIC components within larger system-on-chip platforms. The position requires strong collaboration with RFIC, analog, verification, and system engineering teams to deliver high-performance silicon solutions.

Responsibilities:
  • Design and implement digital and/or mixed-signal ASIC blocks from specification to tapeout
  • Develop RTL (Verilog/SystemVerilog) and/or transistor-level designs depending on focus area
  • Collaborate with RFIC, analog, and system engineers to integrate digital logic within RF and mixed-signal chip architectures.
  • Perform synthesis, timing closure, and power optimization
  • Work with verification engineers to define testbenches and ensure robust design validation
  • Support functional verification and debugging of ASIC components in collaboration with verification teams.
  • Assist with synthesis, timing analysis, and physical implementation activities to ensure design readiness for tape-out.
  • Contribute to silicon bring-up, debugging, and post-silicon validation activities.
  • Document design architecture, implementation details, and verification results.

Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
  • 1-3 years of experience developing and implementing in ASIC design.
  • Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
  • Solid understanding of digital design fundamentals (timing, clocking, power, etc.)
  • Experience with ASIC tool flows (e.g., Synopsys, Cadence, or similar)
  • Familiarity with verification methodologies (UVM is a plus)
  • Strong problem-solving skills and ability to work across disciplines
  • Must be willing to work full-time, onsite, in Atlanta, GA.
Preferred Skills
  • Strong problem-solving skills in complex digital design areas such as clock domain crossing, timing optimization, and low-power design techniques.
  • Hands-on experience with industry EDA tools including HDL simulators, linting tools, and FPGA development platforms.
  • Proficiency in scripting languages such as Python or TCL to support design automation and verification workflows.

Benefits

  • Competitive Salary and Equity Package
  • Comprehensive Health, Dental, and Vision Insurance
  • 401(k) Retirement Plan
  • Paid Time Off (PTO) and Sick Leave

Disclosure:

  • Falcomm is an Equal Opportunity Employer; employment with Falcomm is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
  • Applicants wishing to view a copy of Falcomm's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify Falcomm.
  • To conform to U.S. Government export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

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