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Cpu Rtl Design Engineer Jobs in Atlanta, GA (NOW HIRING)

Cypress HCM

Senior Design Engineer (PMIC)

Suwanee, GA

$150K - $200K/yr

Senior Design Engineer - Mixed-Signal (PMIC) Location: Suwanee, GA 30024 | Reporting To: Sr. ... Designing/writing microarchitecture and RTL coding using System Verilog * Implementing fine-grain ...

Universal Avionics

FPGA Logic Design Manager

Duluth, GA · On-site

$119.70K - $153.70K/yr

Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.

Cypress HCM

Senior Analog Design Engineer

Suwanee, GA

$140K - $180K/yr

Senior Design Engineer - Analog Location: Suwanee, GA 30024 | Reporting To: Sr. Director ... Experience with Verilog RTL coding, including synchronous and asynchronous machines * Experience ...

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159.60K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA · On-site

$159.60K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Falcomm

ASIC Engineer

Atlanta, GA

$159.60K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

CINC

Senior Software/Data Engineer

Atlanta, GA · On-site

$120K/yr

Design and scale fault-tolerant systems that balance consistency and availability. * Database ... Proactively identify bottlenecks by analyzing memory, CPU, and network usage. You will implement ...

CINC

Senior Software/Data Engineer

Atlanta, GA · Hybrid

$116.40K - $153.50K/yr

Design and scale fault-tolerant systems that balance consistency and availability. * Database ... Proactively identify bottlenecks by analyzing memory, CPU, and network usage. You will implement ...

Avnet, Inc.

Field Application Engineer

Atlanta, GA

... Design Closure, RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx factory resources to develop and deliver technical proposals to customer project ...

Centraprise

Mainframe Automation Engineer

Atlanta, GA · On-site +1

... CPU Refreshes etc... * Need to support inherited client automation code, implement & support ... Responsible for all automation tool functionality, design, integration, and implementation.

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Cpu Rtl Design Engineer information

See Atlanta, GA salary details

$38.9K

$84.8K

$152.4K

How much do cpu rtl design engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for cpu rtl design engineer in Atlanta, GA is $84,770.00, according to ZipRecruiter salary data. Most workers in this role earn between $65,400.00 and $94,700.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are popular job titles related to Cpu Rtl Design Engineer jobs in Atlanta, GA? For Cpu Rtl Design Engineer jobs in Atlanta, GA, the most frequently searched job titles are:
What job categories do people searching Cpu Rtl Design Engineer jobs in Atlanta, GA look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Atlanta, GA are:
What cities near Atlanta, GA are hiring for Cpu Rtl Design Engineer jobs? Cities near Atlanta, GA with the most Cpu Rtl Design Engineer job openings:
Cpu Rtl Design Engineer jobs near you
Senior Design Engineer (PMIC)

Senior Design Engineer (PMIC)

Cypress HCM

Suwanee, GA

$150K - $200K/yr

Full-time

Medical, Dental, Vision, Life, Retirement

Posted 22 days ago

Job description

Senior Design Engineer – Mixed-Signal (PMIC)
Location: Suwanee, GA 30024 | Reporting To: Sr. Director, Engineering
Industry: Semiconductor, integrated circuits, memory | Employees: 700
Also open to mixed signal design engineers!
Responsibilities:
  • Contributing to digital and analog circuit design tasks with a focus on PMIC and PPA
  • Working in a growing laboratory with cutting-edge tools, in an R&D focused environment
  • Simulation, debugging, synthesis, timing analysis, and running various RTL tools to identify and fix potential issues
  • Designing/writing microarchitecture and RTL coding using System Verilog
  • Implementing fine-grain power gating for critical paths in the module to reduce leakage
  • Planning and coordinating verification + validation engineering to ensure full validation coverage
  • Floor-planning and supporting integration of digital circuits at top chip level
  • Collaborating with methodology and CAD groups, interfacing between different teams
  • Validating module design for syntax errors via Lint and clock/reset mismatch via CDC + RDC tools
Requirements:
  • 8+ years of professional experience in mixed signal design
  • Experience with low power design using advanced deep micron process
  • Experience with Verilog RTL coding, including synchronous and asynchronous machines
  • Experience with Cadence schematic capture
  • Experience working with Linux-based systems
  • Experience with proportional-integral-derivative (PID) controllers is preferred
  • Experience with Virtuoso, Innovus, SimVision, Verilog, C++, and Python
Benefits:
  • 100% covered medical, dental, vision for the employee (90% coverage for families)
  • 401K with company match (5%)
  • Discounted RSUs
  • FSA, HSA options
  • Life insurance, long-term and short-term disability, and more
Compensation:
  • $150K - $200K + 15% Annual Bonus
  • Relocation assistance in form of a sign-on bonus
  • Also open to staff, principal, or senior principal level candidates & compensation
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About Cypress HCM

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We deliver consistently superior recruiting by virtue of trusting, communicative relationships with companies and candidates alike. From Fortune 100s to startups, clients lean on us to fulfill their range of needs from contract to full-time positions. With an intimate knowledge of the industries we serve, a keen sense of what makes for high-performing talent in any role, and shared sense of urgency, our clients will tell you: your solution begins here.

Industry

Recruiting and staffing services

Company size

51 - 200 Employees

Headquarters location

Walnut Creek, CA, US

Year founded

2005

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