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Cpu Rtl Design Engineer Jobs in Atlanta, GA (NOW HIRING)

Senior Design Engineer - Mixed-Signal (PMIC) Location: Suwanee, GA 30024 | Reporting To: Sr. ... Designing/writing microarchitecture and RTL coding using System Verilog * Implementing fine-grain ...

FPGA Logic Design Manager

Duluth, GA · On-site

$119K - $153K/yr

Complex Engineering Challenges. * Lead highly technical FPGA and PLD development efforts spanning architecture, RTL design, verification, certification, integration, and system-level problem solving.

Senior Design Engineer - Analog Location: Suwanee, GA 30024 | Reporting To: Sr. Director ... Experience with Verilog RTL coding, including synchronous and asynchronous machines * Experience ...

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

ASIC Engineer

Atlanta, GA · On-site

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

ASIC Engineer

Atlanta, GA

$159K/yr

Falcomm is seeking an ASIC Engineer to support the development of mixed-signal and digital ... Strong experience with RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design

Bachelor's, or Master's, degree in Electrical Engineering, with 7+ years of hardware design ... to CPU's, Networking devices, FPGA, timing devices, DDR, PCIe, FLASH memory. * Expertise in analog ...

New

FPGA Engineer

Duluth, GA · On-site

$119K - $153K/yr

Our engineering work is very hands-on and collaborative as we design, prototype, test, and ... Designed with the latest commercially available CPU modules, we use FPGA's to handle HMI interfaces ...

Design and scale fault-tolerant systems that balance consistency and availability. * Database ... Proactively identify bottlenecks by analyzing memory, CPU, and network usage. You will implement ...

Senior Software/Data Engineer

Atlanta, GA · Hybrid

$116K - $153K/yr

Design and scale fault-tolerant systems that balance consistency and availability. * Database ... Proactively identify bottlenecks by analyzing memory, CPU, and network usage. You will implement ...

... Design Closure, RTL and simulation assistance, system bring up and debug) * Collaborate with field and AMD Xilinx factory resources to develop and deliver technical proposals to customer project ...

Staff Engineer

Atlanta, GA · On-site +1

$164K - $274K/yr

Design and implement scalable, high-performance backend systems using Go , with a strong focus on ... Drive performance optimization initiatives across services (CPU, memory, I/O, network), and ...

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Cpu Rtl Design Engineer information

See Atlanta, GA salary details

$38.9K

$84.8K

$152.4K

How much do cpu rtl design engineer jobs pay per year?

As of Jul 19, 2026, the average yearly pay for cpu rtl design engineer in Atlanta, GA is $84,770.00, according to ZipRecruiter salary data. Most workers in this role earn between $65,400.00 and $94,700.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
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Toolchain / Digital Design Engineer

SOUTHEASTERN CYBER LLC

Atlanta, GA • On-site

$130K/yr

Part-time

Posted 21 days ago


Job description

Benefits:
  • Flexible schedule
  • Training & development

Role Summary
Southeastern Cyber LLC is seeking a Digital Design / Toolchain Engineer to extend our proprietary toolchains and pipelines. The engineer will integrate various policies into an automated flow for system and hardware design.
Responsibilities
- Develop and extend EDA/RTL compilation tools and scripts (Python, C++, and/or Rust).
- Map quantified requirements into physical standard-cell routing and logic structures.
- Run synthesis, place-and-route, and area/power/timing (PPA) estimates to sweep architectural scaling limits (max model parameter count, max whitelist/blacklist size).
- Interface with the Principal Investigator and Hardware SME to ensure correct RTL generation and physical implementation.
Required Qualifications
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or Computer Science.
- Demonstrated expertise in EDA toolchains, RTL design (Verilog/SystemVerilog/VHDL), and digital logic synthesis.
- Strong scripting and automation skills for EDA flows.
- US Person (Citizen or Permanent Resident) eligible to work on defense-related technology.

Flexible work from home options available.