... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ... IC layout experience, with significant exposure to mixed-signal designs * Proven track record ...
... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ... IC layout experience, with significant exposure to mixed-signal designs * Proven track record ...
Optoelectronic IC Package Design Director
New Providence, NJ ยท On-site
$235K - $376K/yr
Responsible for package layout, SI/PI optimization, design verification and tapeout * Interface and ... Interface and work with CMs and vendors for sourcing existing designs and future product ...
Optoelectronic IC Package Design Director
New Providence, NJ ยท On-site
$235K - $376K/yr
Responsible for package layout, SI/PI optimization, design verification and tapeout * Interface and ... Interface and work with CMs and vendors for sourcing existing designs and future product ...
Position: IC Layout Manager (Analog/Mixed Signal) Location: Richardson, TX Job Id: 317 # of ... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ...
Position: IC Layout Manager (Analog/Mixed Signal) Location: Richardson, TX Job Id: 317 # of ... designs. Location: Richardson, TX (Hybrid: 3 days onsite) What You'll Do * Lead chip-level layout ...
Optoelectronic IC Package Design Director
New Providence, NJ ยท On-site
$235K - $376K/yr
Responsible for package layout, SI/PI optimization, design verification and tapeout * Interface and ... Interface and work with CMs and vendors for sourcing existing designs and future product ...
Optoelectronic IC Package Design Director
New Providence, NJ ยท On-site
$235K - $376K/yr
Responsible for package layout, SI/PI optimization, design verification and tapeout * Interface and ... Interface and work with CMs and vendors for sourcing existing designs and future product ...
Optoelectronic IC Package Design Director
New Providence, NJ ยท On-site
$235K - $376K/yr
Responsible for package layout, SI/PI optimization, design verification and tapeout * Interface and ... Interface and work with CMs and vendors for sourcing existing designs and future product ...
Optoelectronic IC Package Design Director
New Providence, NJ ยท On-site
$235K - $376K/yr
Responsible for package layout, SI/PI optimization, design verification and tapeout * Interface and ... Interface and work with CMs and vendors for sourcing existing designs and future product ...
Package Layout Engineer
Mountain View, CA ยท On-site
$165K - $225K/yr
You'll sit between the die and the board, co-designing with physical design on one side and PCB ... Own package substrate and interposer layout end to end; stackup definition, bump and ball map ...
Package Layout Engineer
Mountain View, CA ยท On-site
$165K - $225K/yr
You'll sit between the die and the board, co-designing with physical design on one side and PCB ... Own package substrate and interposer layout end to end; stackup definition, bump and ball map ...
Package Layout Engineer
Mountain View, CA ยท On-site
$165K - $225K/yr
You'll sit between the die and the board, co-designing with physical design on one side and PCB ... Own package substrate and interposer layout end to end; stackup definition, bump and ball map ...
Quick apply
Package Layout Engineer
Mountain View, CA ยท On-site
$165K - $225K/yr
You'll sit between the die and the board, co-designing with physical design on one side and PCB ... Own package substrate and interposer layout end to end; stackup definition, bump and ball map ...
RFIC Layout Designer (RFIC Engineering)
$130K - $185K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineer to determine pad locations * Accurately estimate the schedule for the ...
RFIC Layout Designer (RFIC Engineering)
$130K - $185K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineer to determine pad locations * Accurately estimate the schedule for the ...
Advanced IC Package Engineer
San Jose, CA ยท On-site
$159K/yr
We are seeking a motivated Advanced IC Package Engineer to join our Advanced Package Design team ... The ideal candidate brings strong layout experience with multi layer MLO/RDL and ceramic substrates ...
Advanced IC Package Engineer
San Jose, CA ยท On-site
$159K/yr
We are seeking a motivated Advanced IC Package Engineer to join our Advanced Package Design team ... The ideal candidate brings strong layout experience with multi layer MLO/RDL and ceramic substrates ...
RFIC Layout Designer (Starshield Silicon)
Hawthorne, CA ยท On-site
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for ...
RFIC Layout Designer (Starshield Silicon)
Hawthorne, CA ยท On-site
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for ...
IC Package Engineer
Cupertino, CA ยท On-site
$2.0K/mo
... designs, and package warpage mitigation strategies. You will play a key role in ensuring the ... Own the end-to-end package design process, including substrate layout and IC package design, while ...
IC Package Engineer
Cupertino, CA ยท On-site
$2.0K/mo
... designs, and package warpage mitigation strategies. You will play a key role in ensuring the ... Own the end-to-end package design process, including substrate layout and IC package design, while ...
IC Package Engineer
Cupertino, CA ยท On-site
$2.0K/mo
... designs, and package warpage mitigation strategies. You will play a key role in ensuring the ... Own the end-to-end package design process, including substrate layout and IC package design, while ...
IC Package Engineer
Cupertino, CA ยท On-site
$2.0K/mo
... designs, and package warpage mitigation strategies. You will play a key role in ensuring the ... Own the end-to-end package design process, including substrate layout and IC package design, while ...
IC Packaging Design Engineer
Chandler, AZ ยท On-site
$138K/yr
Perform substrate design and package layout activities while ensuring adherence to design ... Optimize package designs for performance, manufacturability, yield, reliability, and cost ...
IC Packaging Design Engineer
Chandler, AZ ยท On-site
$138K/yr
Perform substrate design and package layout activities while ensuring adherence to design ... Optimize package designs for performance, manufacturability, yield, reliability, and cost ...
RFIC Layout Designer (RFIC Engineering)
$120K - $175K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineer to determine pad locations * Accurately estimate the schedule for the ...
RFIC Layout Designer (RFIC Engineering)
$120K - $175K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineer to determine pad locations * Accurately estimate the schedule for the ...
RFIC Layout Designer (Starshield Silicon)
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineers to determine pad locations * Accurately estimate the schedule for the ...
RFIC Layout Designer (Starshield Silicon)
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineers to determine pad locations * Accurately estimate the schedule for the ...
RFIC Layout Designer (Starshield Silicon)
Hawthorne, CA ยท On-site
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for ...
RFIC Layout Designer (Starshield Silicon)
Hawthorne, CA ยท On-site
$120K - $150K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for ...
RFIC Layout Designer (RFIC Engineering)
$120K - $170K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineer to determine pad locations * Accurately estimate the schedule for the ...
RFIC Layout Designer (RFIC Engineering)
$120K - $170K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... with packaging engineer to determine pad locations * Accurately estimate the schedule for the ...
IC Package Engineer
Cupertino, CA ยท On-site
$2.0K/mo
... designs, and package warpage mitigation strategies. You will play a key role in ensuring the ... Own the end-to-end package design process, including substrate layout and IC package design, while ...
IC Package Engineer
Cupertino, CA ยท On-site
$2.0K/mo
... designs, and package warpage mitigation strategies. You will play a key role in ensuring the ... Own the end-to-end package design process, including substrate layout and IC package design, while ...
$100K/yr
We are seeking a motivated Advanced IC Package Engineer to join our Advanced Package Design team ... The ideal candidate brings strong layout experience with multi layer MLO/RDL and ceramic substrates ...
$100K/yr
We are seeking a motivated Advanced IC Package Engineer to join our Advanced Package Design team ... The ideal candidate brings strong layout experience with multi layer MLO/RDL and ceramic substrates ...
RFIC Layout Designer (RFIC Engineering)
Redmond, WA ยท On-site
$120K - $175K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for ...
RFIC Layout Designer (RFIC Engineering)
Redmond, WA ยท On-site
$120K - $175K/yr
You will be an integral part of the IC design team and lead the discipline of layout at the ... Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for ...
Ic Package Layout Designer information
See salary details
$16.79 is the 25th percentile. Wages below this are outliers.
$10.10 - $18.36
31% of jobs
$18.36 - $26.62
16% of jobs
The median wage is $29.10 / hr.
$26.62 - $34.88
11% of jobs
$34.88 - $43.14
15% of jobs
$48.30 is the 75th percentile. Wages above this are outliers.
$43.14 - $51.40
4% of jobs
$51.40 - $59.66
6% of jobs
$59.66 - $67.92
5% of jobs
$67.92 - $76.18
3% of jobs
$76.18 - $84.44
2% of jobs
$84.44 - $92.70
3% of jobs
$92.70 - $100.96
3% of jobs
$10
$41
$100
How much do ic package layout designer jobs pay per hour?
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For Ic Package Layout Designer jobs, the most frequently searched job titles are:

IC Layout Manager (Analog/Mixed Signal)
Richardson, TX โข Hybrid
Full-time
Medical, Dental, Vision, Retirement
Re-posted 23 days ago
Key responsibilities
Lead chip-level layout integration across analog, digital, and IP blocks
Own full-chip physical verification including DRC, LVS, EM/IR, parasitic extraction, and density compliance
Mentor junior layout engineers and contribute to continuous improvement of layout methodologies
Job description
As a Mixed-Signal and Analog IC Layout Manager, you will take ownership of chip-level layout execution and verification for high-performance, full-custom ICs. This is a hands-on leadership role: youโll drive layout quality, guide best practices, and collaborate closely with design, verification, and customer teams to deliver first-pass success on challenging designs.
- Lead chip-level layout integration across analog, digital, and IP blocks
- Own full-chip physical verification: DRC, LVS, EM/IR, parasitic extraction, and density compliance
- Drive layout quality, consistency, and adherence to foundry requirements
- Collaborate with cross-functional teams (design, CAD, verification) across global locations
- Review and interpret layout specifications to ensure accuracy and performance alignment
- Mentor junior layout engineers and contribute to continuous improvement of layout methodologies
- 10+ years of hands-on IC layout experience, with significant exposure to mixed-signal designs
- Proven track record delivering complex, full-custom chips to tape-out
- Deep expertise with industry-standard tools: Cadence Virtuoso or Synopsys Custom Compiler, and physical verification tools such as Calibre, PVS, or IC Validator
- Strong experience with LVS, DRC, and chip-level verification flows
- Solid understanding of semiconductor manufacturing processes and design rules
- High attention to detail and ability to work effectively under tight timelines
- Strong communication skills, with experience working directly with internal teams and external customers
- Must comply with all applicable International Traffic in Arms Regulations (ITAR) requirements (Requires U.S. Persons). Due to the nature of the work and access to export-controlled information, applicants must be authorized to access ITAR-restricted data in accordance with U.S. export control laws and regulations.
- Bachelorโs degree in Electrical Engineering or equivalent experience (Associate degree with significant industry experience considered)
We hire people who are humble, driven, and highly capableโand give them the opportunity to work on technically challenging, meaningful designs. Youโll be part of a team that values ownership, precision, and continuous growth.
- Medical, Dental, Vision, and supplemental coverage
- 401(k) with company match
- Collaborative, engineering-focused culture
IC Enable is committed to building a diverse and inclusive team.
About IC Enable
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
51 - 200 Employees
Headquarters location
Dallas, TX, US
Year founded
2004