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Package Layout Design Engineer Jobs (NOW HIRING)

About This Role Lightmatter is looking for a Package Layout Design Engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power ...

Package Layout Engineer

Mountain View, CA · On-site

$157K - $176K/yr

About This Role Lightmatter is looking for a Package Layout Design Engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power ...

Package Layout Engineer

Mountain View, CA · On-site

$157K - $176K/yr

About This Role Lightmatter is looking for a Package Layout Design Engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power ...

$116K - $160K/yr

Work closely with IC design, package engineering, and product engineering teams to ensure layout designs meet product specifications and package requirements. * Perform design rule checks, layout ...

SiP Layout Design Engineer

Wilmington, MA · On-site

$116K - $160K/yr

Work closely with IC design, package engineering, and product engineering teams to ensure layout designs meet product specifications and package requirements. * Perform design rule checks, layout ...

SiP Layout Design Engineer

Wilmington, MA · On-site

$116K - $160K/yr

Work closely with IC design, package engineering, and product engineering teams to ensure layout designs meet product specifications and package requirements. * Perform design rule checks, layout ...

Experience with industrystandard EDA tools for package layout and design. Preferred Qualifications Experience leading or mentoring layout engineers or small technical teams. Proficiency with Cadence ...

... engineers. • Support package layout activities for complex ASIC packaging projects, ensuring high-quality implementation aligned with package design, SI/PI, and manufacturing requirements. • ...

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Package Layout Design Engineer information

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$45K

$120.8K

$185.5K

How much do package layout design engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for package layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What are popular job titles related to Package Layout Design Engineer jobs?

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Infographic showing various Package Layout Design Engineer job openings in the United States as of August 2026, with employment types broken down into 78% Full Time, 9% Part Time, and 13% Contract. Highlights an 74% Physical, 2% Hybrid, and 24% Remote job distribution, with an average salary of $120,849 per year, or $58.1 per hour.

Package Layout Engineer

Mountain View, CA • Hybrid

Full-time

Posted 21 days ago


Job description

About This Role

Lightmatter is looking for a Package Layout Design Engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power Integrity and Packaging team, tasked with delivering substrate layouts that support the package architecture from concept, through design optimization and completion, meeting stringent signal integrity, power integrity, and design for manufacturing requirements. This position offers a unique opportunity to work on new package architectures by solving complex interactions across digital, analog and photonics domains. 

Responsibilities
  • Deliver IC package substrate layouts for standard and advanced packaging technologies.
  • Contribute to the product concept phase by delivering preliminary substrate designs and floorplanning to support overall stack-up (Silicon/package/MB) optimization.
  • Collaborate with package substrate suppliers and Outsourced Semiconductor Assembly and Test (OSAT) companies to apply layout design rules, stack up, and implementation guidelines.
  • Generate fab files and coordinate with substrate suppliers and OSATs to support Design for Manufacturing (DFM) and Design for Assembly (DFA) closure.
  • Design package layouts while adhering to signal integrity, power integrity, thermal, and mechanical requirements.
  • Design packages incorporating analog and digital elements/interfaces.
  • Support signal/power integrity engineers by providing iterative test routes to refine design rules and routing topologies.
  • Coordinate across functional teams to execute error-free Package Design Tape Outs on schedule.
  • Support and adapt design automation and verification activities to improve team efficiency.
Qualifications
  • B.S. or M.S. degree in Electrical Engineering or similar discipline with at least 5 years of relevant experience
  • Minimum 3-5 years of experience in IC package layout design.
  • Proficient with Allegro X APD.
  • Understanding of IC package substrates and organic materials, and their impact on package design.
Preferred Qualifications
  • Educational background in IC packaging and substrate layout design.
  • Familiarity with system-level validation tools such as Cadence Integrity 3DIC for package/IC codesign.
  • Familiarity with layout tools (e.g., Expedition Package Designer, Pads Layout, Altium, etc.).
  • Experience with layout tool scripting languages (e.g., SKILL or Python) to enable design automation.
  • Exposure to or interest in early-stage architectural pathfinding and physical feasibility studies for multi-chiplet and advanced packaging architectures (2.5D/3D IC, Silicon Interposers, EMIB, Fan-Out Chip-on-Wafer, etc.).
  • Experience evaluating floorplans, escape routing, bump patterns (micro-bumps / hybrid bonding), and die-to-die (D2D) interface topologies.
  • Excellent communication skills and the ability to collaborate effectively in cross-functional teams.