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Ic Layout Engineer Jobs in California (NOW HIRING)

$60K - $96K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

In this role layout engineer with closely work with analog design team to layout and verify custom analog/mixed-signal IPs * Lead full-custom IC layout design and verification, including chip floor ...

Staff Analog Layout Engineer

Sunnyvale, CA · On-site

$160K - $200K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Perform custom IC layout execution of high-speed analog/RF circuits. * Optimize layout solutions to meet stringent TSMC manufacturing constraints, DFM rules, and antenna restrictions * Deliver IP ...

RFIC Layout Designer (Starshield Silicon)

Hawthorne, CA

$120K - $150K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Bachelor's degree in electrical or computer engineering or 3+ years of professional experience with integrated circuit layout design in lieu of a degree * 1+ years of professional experience as an IC ...

Sr. RFIC Layout Designer (Starshield Silicon)

Hawthorne, CA · On-site

$140K - $205K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Bachelor's degree in electrical or computer engineering or 8+ years of professional experience with integrated circuit layout design in lieu of a degree * 5+ years of professional experience as an IC ...

RFIC Layout Designer (Starshield Silicon)

Hawthorne, CA · On-site

$120K - $150K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Bachelor's degree in electrical or computer engineering or 3+ years of professional experience with integrated circuit layout design in lieu of a degree * 1+ years of professional experience as an IC ...

Analog Layout Engineer

Cupertino, CA · On-site

$249K/yr

I have an exciting opportunity as an Sr. AI Enterprise Engineer with one of our clients . If you ... Experience developing and leading complex layout IC for high-speed applications in advanced CMOS ...

New

Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC ... BSEE/BS Engineering Technology or related program * Comfortable with CMOS and SOI technologies ...

New

Cadence Allegro Package Designer / APD+ / SiP, Siemens Xpedition Package Designer, Synopsys IC ... Layout for 112G/224G SerDes or comparable high-speed interfaces; familiarity with signal and power ...

Substrate/Package Layout Engineer

San Jose, CA · On-site

$141K - $226K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...

Cadence Allegro Package Designer / APD+ / SiP, Siemens Xpedition Package Designer, Synopsys IC ... Layout for 112G/224G SerDes or comparable high-speed interfaces; familiarity with signal and power ...

Substrate/Package Layout Engineer

San Jose, CA

$141K - $226K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Broadcom OSD is looking for an IC Substrate and Package/Interposer Layout Engineer. In the role, you will have primary responsibility for the layout, routing, and functionality of packages and ...

RFIC Layout Designer (RFIC Engineering)

Palo Alto, CA

$130K - $185K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...

RFIC Layout Designer (RFIC Engineering)

Irvine, CA

$120K - $170K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...

Analog & RF IC Senior Layout Engineer

Irvine, CA

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

As an Analog/RF Layout Engineer, you won't just watch from the sidelines-you'll be in the trenches of custom IP block design, translating complex schematics into physical reality on the world's most ...

Sr. RFIC Layout Designer (RFIC Engineering)

Irvine, CA

$140K - $230K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...

Showing results 21-40

Ic Layout Engineer information

See California salary details

$44.4K

$119.3K

$183.1K

How much do ic layout engineer jobs pay per year?

As of Aug 15, 2026, the average yearly pay for ic layout engineer in California is $119,266.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,800.00 and $142,100.00 per year, depending on experience, location, and employer.

What are the typical daily responsibilities of an IC layout engineer?

IC Layout Engineers are primarily responsible for translating circuit schematics into precise physical layouts using specialized electronic design automation (EDA) tools. Their daily work often involves collaborating with circuit designers to optimize layouts for performance, checking designs for compliance with foundry rules, and running design rule checks (DRC) and layout-versus-schematic (LVS) verifications. They may also participate in project meetings, troubleshoot design issues, and update documentation as needed. This role requires both independent problem-solving and frequent teamwork to ensure that final layouts are ready for fabrication.

What are the key skills and qualifications needed to thrive in the IC layout engineer position, and why are they important?

To thrive as an IC Layout Engineer, you need a strong background in electrical engineering or a related field, with expertise in analog and digital integrated circuit (IC) layout design. Proficiency in industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys, as well as familiarity with semiconductor processes and design rules, is essential. Strong attention to detail, time management, and effective communication skills are also highly valuable in this position. These skills are critical for delivering accurate, manufacturable layouts that meet stringent performance and reliability standards in fast-paced engineering environments.

What is an IC layout engineer?

An IC Layout Engineer is responsible for designing the physical layout of integrated circuits (ICs), translating circuit schematics into manufacturable chip layouts. They ensure design accuracy, optimize performance, and follow foundry design rules. Using tools like Cadence Virtuoso or Synopsys IC Compiler, they create layouts for analog, digital, or mixed-signal circuits. Their work is critical in minimizing power consumption, improving efficiency, and ensuring manufacturability.

What are the most commonly searched types of Ic Layout Engineer jobs in California?

The most popular types of Ic Layout Engineer jobs in California are:

What are popular job titles related to Ic Layout Engineer jobs in California?

For Ic Layout Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Ic Layout Engineer jobs in California look for?

The top searched job categories for Ic Layout Engineer jobs in California are:

What cities in California are hiring for Ic Layout Engineer jobs?

Cities in California with the most Ic Layout Engineer job openings:

Infographic showing various Ic Layout Engineer job openings in California as of August 2026, with employment types broken down into 88% Full Time, 5% Part Time, 2% Temporary, and 5% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $119,266 per year, or $57.3 per hour.

$96K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 23 days ago


Job description

Company Overview:
MACOM designs and manufactures semiconductor products for DataCenter, Telecommunication, and Industrial and Defense applications.Headquartered in Lowell, Massachusetts, MACOM has design centers and salesoffices throughout North America, Europe, and Asia. MACOM is certified to theISO9001 international quality standard and ISO14001 environmental managementstandard.
MACOM has more than 75 years of application expertisewith multiple design centers, Si, GaAs, and InP fabrication, manufacturing,assembly and test, and operational facilities throughout North America, Europe,and Asia. Click here to view our facilities. https://www.macom.com/. Inaddition, MACOM offers foundry services that represents a key corecompetency within our business.
MACOM sells and distributes products globally via asales channel comprised of a direct field sales force, authorized salesrepresentatives, and leading industry distributors. Our sales team is trainedacross all of our products to give our customers insights into our entireportfolio.
Role: Analog Layout Designer
Job Description:
  • In this role layout engineer with closely work with analog design team to layout and verify custom analog/mixed-signal IPs
  • Lead full-custom IC layout design and verification, including chip floor planning, analog IP layout and chip level layout integration of various analog, mixed signal and ASIC blocks
  • Full verification of Block level and top-level layout including extraction, DRC, LVS, and DFM checking
  • Layout schedule planning and working with other IP layout engineers to integrate various layout blocks
  • Co-work with designers on block level and top-level floor planning
  • Layout review for power/gnd routing, electro migration, signal path check, matching, and signal coupling

Qualifications:
  • Bachelor's degree in engineering
  • High-speed Mixed-Signal layout design expertise
  • Minimum 4 years of custom layout experience
  • Knowledge of Cadence Virtuoso design flow
  • High level proficiency in interpretation of CALIBRE DRC, ERC, LVS reports.
  • Full understanding of IR drop, RC delay, Electro migration and chip finishing
  • Ability to do floor planning and do area estimate
  • Good communication with circuit designers and other layout engineers
  • Familiarity with high-speed BiCMOS layout is a plus
  • Scripting in Cadence is a plus.

The Salary Range for this position is $60,000 - $96,000. Actualsalary offered to candidate will depend on several factors, including but notlimited to, work location, relevant candidates' experience, education, andspecific knowledge, skills, and abilities.Benefits:
This position offers a comprehensive benefits package including but not limitedto:
  • Health, dental, and vision insurance.
  • Employer-sponsored 401(k) plan.
  • Paid time off.
  • Professional development opportunities.
  • Free access to gym onsite

EEO:
MACOM is an Equal Opportunity Employer committed to a diverseworkforce. MACOM will not discriminate against any worker or job applicant onthe basis of race, color, religion, sex, gender identity, sexual orientation,national origin, age, disability, genetic information, veteran status, militaryservice, marital status, or any other category protected under applicable law.
Reasonable Accommodation:
MACOM is committed to working with and providing reasonableaccommodations to qualified individuals with physical and mental disabilities. Ifyou have a disability and are in need of a reasonable accommodation withrespect to any part of the application process, please call +1-978-656-2500 oremail HR_Ops@MACOM.com. Provide your name, phone number and the position titleand location in which you are interested, and nature of accommodation needed,and we will get back to you. We also work with current employees who request orneed reasonable accommodation in order to perform the essential functions oftheir jobs.