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Ic Layout Design Engineer Jobs in California (NOW HIRING)

OMNIVISION

Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

Analog Design Engineer Job Duties: Conduct design and development of image sensor technologies ... Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Analog Design Engineer Job Duties: Conduct design and development of image sensor technologies ... Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment ...

Micron

Staff Layout Designer

San Jose, CA

$72 - $122/hr

IC layout design experience with NAND, DRAM and/or SRAM * Programming skills and AI experience relevant to layout workflow The US base salary range that Micron Technology estimates it could pay for ...

SpaceX

RFIC Layout Designer (RFIC Engineering)

Irvine, CA · On-site

$120K - $170K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...

NuByt, Inc

Be Seen First

Analog Layout Engineer

San Jose, CA · On-site

$90 - $95/hr

The ideal candidate will have strong hands-on experience with analog IC layout, advanced process ... Perform design verification, including DRC, LVS, ERC, ANT , and parasitic extraction. * Collaborate ...

New

SpaceX

RFIC Layout Designer (RFIC Engineering)

Irvine, CA · On-site

$120K - $170K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the ... engineer to determine pad locations * Accurately estimate the schedule for the layout work and ...

Saige Partners

Analog Layout Engineer

San Jose, CA

$100 - $110/hr

Senior High-Speed Mixed-Signal / Analog IC Layout Engineer (San Jose, CA) As an Analog Layout ... Design verification including DRC, LVS, ERC and ANT and extraction. Block level floor planning with ...

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All JobsIc Layout Design Engineer JobsIc Layout Design Engineer Jobs in California

Ic Layout Design Engineer information

See California salary details

$44.4K

$119.3K

$183.1K

How much do ic layout design engineer jobs pay per year?

As of Aug 8, 2026, the average yearly pay for ic layout design engineer in California is $119,266.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,800.00 and $142,100.00 per year, depending on experience, location, and employer.

What does an IC layout design engineer do?

An IC Layout Design Engineer is responsible for creating the physical design of integrated circuits (ICs) based on schematic designs. They ensure optimal placement and routing of transistors and interconnections while meeting performance, power, and area constraints. They work closely with circuit designers and verification engineers to ensure manufacturability and compliance with design rules. Tools like Cadence Virtuoso or Mentor Graphics are commonly used in this role.

What are the key skills and qualifications needed to thrive as an IC layout design engineer?

To thrive as an IC Layout Design Engineer, you need strong expertise in analog and/or digital IC layout, semiconductor device physics, and an educational background in electrical engineering or a related field. Familiarity with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, and proficiency with layout verification techniques (like DRC and LVS) are typically required. Exceptional attention to detail, effective communication, and the ability to collaborate closely with circuit design teams are valuable soft skills. These skills are essential to ensure the successful design, optimization, and integration of complex integrated circuits in high-performance environments.

What are the common challenges faced by IC layout design engineers on the job?

IC Layout Design Engineers often encounter challenges such as meeting strict design specification requirements, managing complex circuitry within limited silicon area, and ensuring layouts comply with manufacturing constraints. They may need to troubleshoot and resolve issues with DRC/LVS errors, work under tight project deadlines, and adapt quickly to changes in design parameters. Close collaboration with circuit design engineers and verification teams is common, requiring strong teamwork and effective communication. These challenges make the role dynamic and can provide excellent opportunities to develop specialized skills and advance into lead or principal engineering positions over time.

What are the most commonly searched types of Ic Layout Design Engineer jobs in California? The most popular types of Ic Layout Design Engineer jobs in California are:
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Ic Layout Design Engineer jobs near you
Infographic showing various Ic Layout Design Engineer job openings in California as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $119,266 per year, or $57.3 per hour.

Analog Design Engineer

OMNIVISION

Santa Clara, CA

$156K - $160K/yr

Full-time

Re-posted 16 days ago

Job description

Job Title: Analog Design Engineer 
 
Job Duties:
 
Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso. Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso. Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice. Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with Digital Engineer to define and design the analog to digital interface. Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors. Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology. Process the column readout data from the CMOS sensor using data processing software like Excel and MATLAB. Perform a performance check and conduct debug analysis based on the data results. Design the internal Discrete-time Circuits, Peripheral circuits and Timing control for a CMOS image sensor, including bias circuits, driver/level shifter, switched capacitor, logic gates and slew rate control. 
 
Requirements:
 
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineer, Electro-Optics, or a related field with graduate level course work of Analog IC Design, Data Converters, and VLSI Circuits and Technology.
 
Must possess the skills of:
 
  • Layout design and floor planning.
  • Testing and troubleshooting power IC.
  • Using lab equipment testing specific IC.
  • Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors, Optical filters.
  • Matlab and Excel to do signal processing, imaging processing and data analysis.
  • Feedback, opamp, switched-capacitor circuits, layout and mismatch, and noise.
  • Data converter systems and circuits, including ADC and DAC architecture such as flash, two-step, pipelined, algorithmic, successive-approximation, R-2R DACs.
  • Analysis and design of modern digital circuits. Design and analyze CMOS digital circuit. Use commercial software Cadence. 
 
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.

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