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Ic Layout Design Engineer Jobs in California (NOW HIRING)

Sr IC Digital Layout Designer

Irvine, CA · On-site

$130K - $160K/yr

Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or related field. 7+ years of experience in digital IC layout design in advanced technology ...

CA · On-site

... design, routing channels, and macro assembly. · Carry out, debug, and complete DRC, LVS, ERC ... Have a BSEE or equivalent experience 10+ years of custom IC layout experience, including 5+ years ...

Sr IC Digital Layout Designer

Irvine, CA · Hybrid

$130K - $160K/yr

Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or related field. 7+ years of experience in digital IC layout design in advanced technology ...

Job Summary: We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to ... Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ...

Under general supervision, take responsibility for specific subtasks such as block design, layout ... IC Design Engineer Level 2: * Bachelor's degree (or equivalent) with 2+ years of relevant IC design ...

Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...

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Showing results 1-20

Ic Layout Design Engineer information

See California salary details

$44.4K

$119.3K

$183.1K

How much do ic layout design engineer jobs pay per year?

As of Jul 18, 2026, the average yearly pay for ic layout design engineer in California is $119,266.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,800.00 and $142,100.00 per year, depending on experience, location, and employer.

What does an IC Layout Design Engineer do?

An IC Layout Design Engineer is responsible for creating the physical design of integrated circuits (ICs) based on schematic designs. They ensure optimal placement and routing of transistors and interconnections while meeting performance, power, and area constraints. They work closely with circuit designers and verification engineers to ensure manufacturability and compliance with design rules. Tools like Cadence Virtuoso or Mentor Graphics are commonly used in this role.

What are the key skills and qualifications needed to thrive in the Ic Layout Design Engineer position, and why are they important?

To thrive as an IC Layout Design Engineer, you need strong expertise in analog and/or digital IC layout, semiconductor device physics, and an educational background in electrical engineering or a related field. Familiarity with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, and proficiency with layout verification techniques (like DRC and LVS) are typically required. Exceptional attention to detail, effective communication, and the ability to collaborate closely with circuit design teams are valuable soft skills. These skills are essential to ensure the successful design, optimization, and integration of complex integrated circuits in high-performance environments.

What are the common challenges faced by IC Layout Design Engineers on the job?

IC Layout Design Engineers often encounter challenges such as meeting strict design specification requirements, managing complex circuitry within limited silicon area, and ensuring layouts comply with manufacturing constraints. They may need to troubleshoot and resolve issues with DRC/LVS errors, work under tight project deadlines, and adapt quickly to changes in design parameters. Close collaboration with circuit design engineers and verification teams is common, requiring strong teamwork and effective communication. These challenges make the role dynamic and can provide excellent opportunities to develop specialized skills and advance into lead or principal engineering positions over time.

What are the most commonly searched types of Ic Layout Design Engineer jobs in California? The most popular types of Ic Layout Design Engineer jobs in California are:
What cities in California are hiring for Ic Layout Design Engineer jobs? Cities in California with the most Ic Layout Design Engineer job openings:
Infographic showing various Ic Layout Design Engineer job openings in California as of July 2026, with employment types broken down into 87% Full Time, 9% Part Time, 1% Temporary, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $119,266 per year, or $57.3 per hour.
Staff Analog IC Layout Engineer

Staff Analog IC Layout Engineer

Elevate Semiconductor

San Diego, CA • On-site

$120K - $180K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 21 days ago


Job description

Elevate Semiconductor is at the forefront of shaping the future of semiconductor technology, driving innovation to enable the next generation of testing. We deliver comprehensive solutions that streamline semiconductor testing, empowering faster time-to-market and enhanced capabilities. Our diverse product portfolio includes standard, semi-custom, and custom SKUs, all engineered for longevity and compatibility across evolving technological advancements. By focusing on low-power, high-density designs, we aim to lower the cost of testing while exceeding expectations on every project.

Join us in advancing the cutting edge of semiconductor innovation!

The Position

We are seeking a highly skilled Staff Analog Layout Engineer to join our team in developing state-of-the-art integrated circuits (ICs). In this role, you will handle the physical layout and verification of highly complex, high-voltage, and mixed-signal solutions using advanced process technologies, ranging from 65nm CMOS to 100+V BCD. You will collaborate with a cross-functional team to optimize silicon design, leveraging mentorship and support from senior engineers to deliver innovative and cost-effective solutions.

Must be able to work onsite in San Diego,CA.

Responsibilities

  • Performing physical layout of analog and mixed-signal integrated circuits at the block and chip level
  • Conducting floorplanning and placement of circuit components to optimize area, performance, and power
  • Verifying layouts using industry-standard tools for LVS (Layout vs. Schematic) and DRC (Design Rule Checking) to ensure compliance with process design rules
  • Collaborating closely with design engineers to understand circuit specifications and ensure layout accuracy
  • Working with cross-functional teams, including digital design and packaging, to optimize overall chip performance
  • Troubleshooting and resolving issues related to layout verification and manufacturing

Requirements

  • Bachelor’s degree in Electrical Engineering or a related field
  • Minimum of 8 years of professional experience in analog and mixed-signal IC layout design
  • Strong knowledge of analog CMOS circuits and device physics fundamentals
  • Solid understanding of the IC design, qualification, and manufacturing lifecycle
  • Hands-on experience with industry-standard EDA tools for analog and mixed-signal design (e.g., Cadence, Mentor Graphics, Tanner)
  • Proficiency in performing LVS and DRC verification using Cadence or Mentor tools

Preferences

  • Layout experience with STI High voltage (100V+) BCD and LDMOS processes
  • Layout experience with mixed voltage (multiple supply rails, 6 or more) domains
  • Layout experience with high speed multi Gbps circuits.
  • Layout experience in ultra-high accuracy and precision circuits.
  • Layout experience with high resolution data converters.
  • Layout experience with BiCMOS process technology.
  • Programming and scripting ability a strong plus, particularly in SKILL and Calibre scripts

Why Join Us?

At Elevate Semiconductor, you’ll be part of a dynamic team working on innovative technologies that shape the future of the semiconductor industry. We offer competitive compensation, comprehensive benefits, and opportunities for professional growth in a collaborative environment.

Apply Today!

If you are passionate about digital design and eager to contribute to groundbreaking semiconductor solutions, we want to hear from you!

Benefits

  • 100% Employer Paid Health Insurance (Medical, Dental, Vision)
  • Unlimited Paid Time Off
  • Performance Bonuses
  • Free Lunch Catered in by Local Restaurants
  • Private Equity Options
  • Retirement Plans
  • Sabbatical Program
  • Tuition Reimbursement
  • Volunteer Days
  • Relocation Assistance
  • Conference Attendance Support
  • Biweekly Phone Stipend
  • Employee Assistance Program

The salary range for this role is $120,000-$180,000.00.

Please note: While a salary range is provided, the final compensation will depend on your experience, skill set, and how well you're able to highlight your background throughout the interview process.