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Ic Layout Design Engineer Jobs in Arizona (NOW HIRING)

IC CAD Engineer

Chandler, AZ ยท On-site

$127K - $203K/yr

Creation of documentation and hands-on training for AMS Design & Layout engineers as needed. * Tracking and resolution of tool and technology file issues with hands-on management per objectives of ...

IC CAD Engineer

Chandler, AZ ยท On-site

$127K - $203K/yr

Creation of documentation and hands-on training for AMS Design & Layout engineers as needed. * Tracking and resolution of tool and technology file issues with hands-on management per objectives of ...

Digital Design Engineer

Chandler, AZ ยท On-site

$133K/yr

... analog, verification, layout, and test teams to deliver robust, manufacturable designs ... Bachelor's with 2+ years of relevant digital IC design experience. * Master's with 0+ years of ...

Analog Engineer

Phoenix, AZ ยท On-site

$200K/yr

... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...

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Showing results 1-20

Ic Layout Design Engineer information

See Arizona salary details

$41.9K

$112.6K

$172.9K

How much do ic layout design engineer jobs pay per year?

As of Jul 3, 2026, the average yearly pay for ic layout design engineer in Arizona is $112,617.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,900.00 and $134,200.00 per year, depending on experience, location, and employer.

What does an IC Layout Design Engineer do?

An IC Layout Design Engineer is responsible for creating the physical design of integrated circuits (ICs) based on schematic designs. They ensure optimal placement and routing of transistors and interconnections while meeting performance, power, and area constraints. They work closely with circuit designers and verification engineers to ensure manufacturability and compliance with design rules. Tools like Cadence Virtuoso or Mentor Graphics are commonly used in this role.

What are the key skills and qualifications needed to thrive in the Ic Layout Design Engineer position, and why are they important?

To thrive as an IC Layout Design Engineer, you need strong expertise in analog and/or digital IC layout, semiconductor device physics, and an educational background in electrical engineering or a related field. Familiarity with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, and proficiency with layout verification techniques (like DRC and LVS) are typically required. Exceptional attention to detail, effective communication, and the ability to collaborate closely with circuit design teams are valuable soft skills. These skills are essential to ensure the successful design, optimization, and integration of complex integrated circuits in high-performance environments.

What are the common challenges faced by IC Layout Design Engineers on the job?

IC Layout Design Engineers often encounter challenges such as meeting strict design specification requirements, managing complex circuitry within limited silicon area, and ensuring layouts comply with manufacturing constraints. They may need to troubleshoot and resolve issues with DRC/LVS errors, work under tight project deadlines, and adapt quickly to changes in design parameters. Close collaboration with circuit design engineers and verification teams is common, requiring strong teamwork and effective communication. These challenges make the role dynamic and can provide excellent opportunities to develop specialized skills and advance into lead or principal engineering positions over time.

What job categories do people searching Ic Layout Design Engineer jobs in Arizona look for? The top searched job categories for Ic Layout Design Engineer jobs in Arizona are:
What cities in Arizona are hiring for Ic Layout Design Engineer jobs? Cities in Arizona with the most Ic Layout Design Engineer job openings:
Infographic showing various Ic Layout Design Engineer job openings in Arizona as of June 2026, with employment types broken down into 96% Full Time, and 4% Contract. Highlights an 87% In-person, 4% Hybrid, and 9% Remote job distribution, with an average salary of $112,617 per year, or $54.1 per hour.
Senior Staff Analog Design Engineer

Senior Staff Analog Design Engineer

Cirrus Logic

Chandler, AZ โ€ข On-site

$198K/yr

Full-time

Posted 19 days ago


Job description

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!
We are seeking a highly motivated Analog Design Engineer to join a collaborative hardware design team developing high performance analog and mixed signal integrated circuits for advanced consumer and embedded applications. In this role, you will contribute to the design of next generation ICs spanning data converters, power management, amplifiers, and common analog infrastructure implemented in advanced CMOS processes.
You will participate in the full IC development lifecycle, from concept and architecture through silicon validation and production, while working closely with cross functional teams to deliver robust, manufacturable solutions that integrate easily into customer systems.
Responsibilities:
  • Design and develop analog and mixed-signal IC blocks from concept through production, including data converters, power management, amplifiers, and supporting circuitry in advanced CMOS processes.
  • Define architectures, perform transistor-level design, and create behavioral and system models using tools such as Matlab, Verilog-A, SystemVerilog, and Simulink.
  • Simulate and verify circuit and chip-level performance using Spectre and mixed-signal methodologies (analog-on-top, digital-on-top).
  • Lead or support layout implementation, post-layout simulation, and performance optimization, ensuring DRC/LVS closure.
  • Perform silicon bring-up, lab validation, debug, and post-silicon characterization using standard lab instrumentation.
  • Collaborate with cross-functional teams including digital, layout, test, and systems engineering to ensure robust, manufacturable designs.
  • Support product validation, characterization, and production test development through debug, analysis, and silicon learning.
  • Contribute to design reviews, technical documentation, and reusable analog infrastructure or platforms.

Required Knowledge, Skills, and Experience:
  • Degree in Electrical Engineering, Computer Engineering, or related field:
    • Bachelor's with 10+ years of relevant IC design experience.
    • Master's with 8+ years of relevant IC design experience.
    • PhD with 6+ years of relevant IC design experience.
  • Strong foundation in CMOS analog and mixed-signal IC design.
  • Deep understanding of the analog design flow: architecture, design, integration, verification, and silicon validation.
  • Proficiency with analog modeling and simulation tools (e.g., Matlab, Spectre, Verilog-A, SystemVerilog).
  • Solid understanding of device physics, noise analysis, stability, and control theory.
  • Hands-on lab experience with silicon debug and validation.
  • Strong analytical, problem-solving, and communication skills.
  • Organized, detail-oriented, and comfortable working in a fast-paced, collaborative environment.

Preferred Knowledge, Skills, and Experience:
  • Experience with:
    • Power conversion architectures (inductive and/or capacitive)
    • Delta-sigma ADCs/DACs and discrete-time or continuous-time signal processing
    • Switched-capacitor circuits, PLLs, LNAs, and audio-oriented analog blocks
    • System and behavioral modeling
  • Familiarity with reliability topics (ESD, latch-up, long-term device stress).
  • Experience across multiple CMOS process nodes and geometry scales.
  • Ability to plan, lead, and review analog subsystem designs.

#LI-Hybrid
#LI-TM1
#HOTT
Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.
Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.