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High Speed Network Fpga Design Engineer Jobs (NOW HIRING)

Silvus Technologies

FPGA Design Engineer

Los Angeles, CA · Hybrid

$132K - $182K/yr

... networking products. In addition, they participate in the support and development of FPGA-based ... Proven expertise working with multiple clock-domain, high-utilization FPGA designs. * Experience ...

Northrop Grumman

FPGA Design Engineer

Rolling Meadows, IL · On-site

$96K - $144K/yr

... high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and interfaces. As an FPGA Design Engineer, you will join our diverse team and be ...

HPR

FPGA Design Engineer II

Needham, MA · On-site

$90K - $216K/yr

As an FPGA Design Engineer at HPR, you will: * Design, develop, optimize, and maintain high ... In-depth knowledge of networking protocols (IP, TCP, UDP) * Experience with high-speed interfaces ...

HPR

FPGA Design Engineer II

Needham, MA · On-site

$90K - $216K/yr

As an FPGA Design Engineer at HPR, you will: * Design, develop, optimize, and maintain high ... In-depth knowledge of networking protocols (IP, TCP, UDP) * Experience with high-speed interfaces ...

Amazon

Senior FPGA Engineer, LEO Payload FPGA

Sunnyvale, CA · On-site

$152K - $196K/yr

The FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA ... high speed networking, SerDes, 50G/100G Ethernet or Interlaken. - Familiarity with AXI4 and AXI ...

Chipton Ross

FPGA/ASIC Design Engineer

Del Rey, CA · On-site

$118K - $163K/yr

Job #215247 Chipton-Ross is seeking an FPGA/ASIC Design Engineer for a contract opportunity in ... Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet). PHYSICAL REQUIREMENTS (if noted by ...

E-Space

FPGA Design Engineer - Avionics

Saratoga, CA

$150K - $250K/yr

We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for ... Develop SPI, I²C, GPIO, and other low-speed peripheral interfaces alongside high-speed transceiver ...

Silvus Technologies

FPGA Design Engineer

Irvine, CA · On-site

$132K - $181K/yr

... networking products. In addition, they participate in the support and development of FPGA-based ... Proven expertise working with multiple clock-domain, high-utilization FPGA designs. * Experience ...

E-Space

FPGA Design Engineer - Avionics

Saratoga, CA · On-site

$150K - $250K/yr

We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for ... Develop SPI, IC, GPIO, and other low-speed peripheral interfaces alongside high-speed transceiver ...

A2e Technologies

Sr. FPGA Design Engineer

San Diego, CA · On-site

$130K - $180K/yr

Title: Sr. FPGA Design Engineer Location: Redmond Term: Contract (possible Perm) Duration ... High-speed Serdes * Solid scripting (python, pearl, bash, tcl, ...) Solid Communication interfaces ...

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How much do high speed network fpga design engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for high speed network fpga design engineer in the United States is $109,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $89,000.00 and $133,500.00 per year, depending on experience, location, and employer.

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Infographic showing various High Speed Network Fpga Design Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 80% Full Time, 16% Part Time, and 3% Contract. Highlights an 90% Physical, 1% Hybrid, and 9% Remote job distribution, with an average salary of $109,040 per year, or $52.4 per hour.

FPGA Design Engineer

Los Angeles, CA • Hybrid

Silvus Technologies
Wireless Telecommunications Carriers • 51 - 200 employees
Learn more about Silvus Technologiesexternal

$132K - $182K/yr

Full-time

Re-posted 22 days ago

Job description

THE OPPORTUNITY

Silvus is seeking a Senior FPGA / RTL Design Engineer reporting to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment.  FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D.  These are exciting projects targeted to address challenging real-world communication needs. 

The Senior FPGA / RTL Design Engineer position will be based at Silvus headquarters in the heart of vibrant West Los Angeles, CA and is on a hybrid schedule; a minimum of 3 days onsite per week is expected. On-site days are Mondays, Wednesdays, and Thursdays.

The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion. 

ROLE AND RESPONSIBILITIES

  • Digital design architecting for wireless communication projects.
  • Fixed point design of signal processing blocks while working with systems engineers.
  • RTL coding, simulation, and test bench development.
  • FPGA synthesis and timing closure.
  • Hardware verification and troubleshooting; familiarity with logic analyzers.
  • Provide support to the RF and Software Engineering teams.

REQUIRED QUALIFICATIONS

  • Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant fields.
  • Minimum 6 years of demonstrated experience in FPGA design; 4 years of FPGA design experience with a Master's of Science degree; 2 years of FPGA design experience with a PhD degree.
  • Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
  • Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
  • Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
  • NOTE - Must be a U.S. Person (U.S. Citizen, or U.S. Permanent Resident) due to clients under U.S. federal contracts.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES

  • Master of Science degree in Electrical Engineering (MSEE).
  • Basic MATLAB skill.
  • Experience with communication systems on FPGA or ASIC designs.

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