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Asic Fpga Design Engineer Jobs (NOW HIRING)

Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments * Determines ...

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Asic Fpga Design Engineer information

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How much do asic fpga design engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for asic fpga design engineer in the United States is $147,056.00, according to ZipRecruiter salary data. Most workers in this role earn between $123,000.00 and $169,500.00 per year, depending on experience, location, and employer.

What does an ASIC FPGA design engineer do?

An ASIC/FPGA Design Engineer is responsible for designing, implementing, and verifying digital circuits using ASIC (Application-Specific Integrated Circuit) or FPGA (Field-Programmable Gate Array) technologies. They work with hardware description languages (HDLs) like VHDL or Verilog to create efficient and optimized digital designs. Their role includes simulation, synthesis, timing analysis, and integration with embedded systems. They collaborate with hardware and software teams to ensure functionality and performance requirements are met.

What are some common daily responsibilities for an ASIC FPGA design engineer?

ASIC FPGA Design Engineers typically spend their days developing and verifying digital hardware modules using hardware description languages, collaborating with system architects to define specifications, and running simulation tests to validate design functionality. They often participate in design reviews, troubleshoot issues found in prototypes or simulations, and document their work for future reference. Collaboration with firmware, software, and verification teams is routine, ensuring tight integration between hardware and software subsystems. This dynamic role offers the opportunity to solve challenging engineering problems and contribute directly to the development of cutting-edge electronic products.

What are the key skills and qualifications needed to thrive in the ASIC FPGA design engineer position, and why are they important?

To excel as an ASIC FPGA Design Engineer, a strong background in digital logic design, hardware description languages (such as VHDL or Verilog), and electronics engineering is essential, often supported by a degree in electrical or computer engineering. Familiarity with industry-standard tools like Xilinx Vivado, Synopsys Design Compiler, ModelSim, and relevant certifications enhance productivity and ensure industry compliance. Strong problem-solving abilities, teamwork, and effective communication skills help drive complex projects to completion and support collaboration with cross-functional teams. These abilities are crucial for delivering high-performance, reliable hardware solutions in a fast-paced, innovation-driven environment.

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Infographic showing various Asic Fpga Design Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 87% Full Time, 9% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $147,056 per year, or $70.7 per hour.

ASIC & FPGA Design Engineer Sr

Grand Prairie, TX • On-site

Lockheed Martin Corporation
Manufacturing • 10K+ employees

$117K - $162K/yr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 14 days ago


Key responsibilities

  • Define architecture and design specifications for ASIC/FPGA components.

  • Develop and verify RTL code, simulation models, and verification environments to ensure functional correctness and timing requirements.

  • Lead hardware in the loop testing, board level debugging, and integration with subsystem hardware.


Lockheed Martin rating

8.2

Company rating: 8.2 out of 10

Based on 400 frontline employees who took The Breakroom Quiz


Job description


You will be the Senior ASIC & FPGA Design Engineer for the Programmable Logic Design team within Lockheed Martin Missiles and Fire Control (MFC). Our team creates, prototypes, and fields precision engagement aerospace and defense systems for the U.S. and allied militaries, delivering cutting edge digital solutions that protect the warfighter.
What You Will Be Doing
As the Senior ASIC & FPGA Design Engineer you will act as a technical leader on one or more defense programs, shaping the architecture, verification and integration of advanced FPGA based hardware. You will translate system level performance, safety and reliability requirements into robust programmable logic designs, while collaborating with cross functional engineers to keep the program on schedule and on budget. Your responsibilities will include:
Define architecture and design specifications for ASIC/FPGA components; write clean, maintainable RTL (VHDL, Verilog, SystemVerilog) that meets performance, power and reliability goals.
Develop synthesis, place and route and timing closure strategies to guarantee deterministic operation on target devices.
Create comprehensive test plans, simulation models and verification environments (UVM, SystemC, Python based testbenches) to validate functional correctness and timing margins.
Lead hardware in the loop (HIL) testing, board level debugging and integration with subsystem hardware.
Conduct timing analysis, power budgeting and resource utilization studies to optimize device selection and FPGA utilization.
Manage configuration control using GitLab (or equivalent), maintain version controlled repositories and ensure full traceability of all artifacts.
Produce complete design documentation-specifications, test plans, verification reports and release packages-that complies with aerospace standards.
Collaborate with systems, software, hardware, mechanical, test, manufacturing and quality teams to guarantee seamless integration and milestone compliance.
Mentor junior engineers, championing best practices in FPGA development, verification and configuration management.
Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.
We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin's comprehensive benefits package here.
Further Information About This Opportunity:
This position is in Dallas. Discover more about our Dallas, Texas location.
The selected candidate must be able to obtain a secret clearance.
Basic Qualifications
Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university; Master's degree preferred
Minimum 3 years of professional experience with FPGA design and simulation verification or a related discipline
Proficiency in HDL programming with VHDL, Verilog, and/or SystemVerilog
Experience with Xilinx/AMD toolsets (Vivado, Vitis, Vitis HLS) and UltraScale design methodology
Experience with FPGA simulation tools such as Synopsys VCS
Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity
Experience with high-speed interfaces such as AXI, Ethernet, TCP/IP, PCIe, and serial protocols
Practical laboratory debug experience with high-speed oscilloscopes, spectrum analyzers, and signal generators
Familiarity with Synopsys EDA tools
Desired skills
LM/MFC design experience and missile program experience
Experience with SystemVerilog, Verilog, C/C++, MATLAB/Simulink; Synopsys Synplify, Synopsys VCS, NCSim, ChipScope tool sets
Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric and IP
Experience implementing NSA algorithms (e.g., AES, counter mode)
Experience managing configuration control (GitLab preferred)
Experience with Vivado and Vitis FPGA toolsets
Experience with UVM and Simulink/HDL Coder integration
Comfortable using digital oscilloscopes, spectrum analyzers, power meters, signal generators, and other test equipment
Experience with troubleshooting and debugging at board level, including FPGA validation
Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test)
Strong communication, collaboration, and presentation abilities
Controls and digital loop-closure application knowledge
Networking proficiency with Ethernet switches, routers, firewalls, and debugging tools (tcpdump, Wireshark)
Active DoD Secret or Top Secret clearance
EEO
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration.
*
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility.
If this sounds like a culture you connect with, you're invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs, and apply for roles that align with your qualifications.
Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to work remotely
Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
Work Schedule Information
Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
National Pay Statement
Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $101,000 - $178,135. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
(Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
This position is incentive plan eligible.
Premium Pay Statement
Pay Rate: The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $116,200 - $201,365. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
This position is incentive plan eligible.

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About Lockheed Martin

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As a global security and aerospace company, the majority of Lockheed Martin's business is with the U.S. Department of Defense and U.S. federal government agencies.The remaining portion of Lockheed Martin's business is comprised of international government and commercial sales of products, services and platforms.

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Bethesda, MD, US

Year founded

1912