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Freelance Asic Rtl Design Engineer Jobs in Philadelphia, PA

Interpret engineering drawings and create accurate 3D CAD models. * Develop complex mechanical ... RTL * 3D Mechanical Modeling * Computational Geometry Qualifications * Strong experience with CAD ...

FPGA Engineer

Moorestown, NJ

$128K - $164K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

FPGA Engineer

Moorestown, NJ · On-site

$128K - $164K/yr

Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

In close association with the team lead electrical controls engineer, design control panel layouts ... ABB AC800M/S800, AC700F/Freelance, AC500 PLC controller and IO hardware knowledge * Low voltage ...

Visual Designer

Philadelphia, PA · On-site

$50 - $60/hr

Our client, a major telecomm company, is looking for a Freelance Visual Designer to support a ... engineering teams to bring concepts to life * Work within established design systems while ...

Lead Program Management

Camden, NJ · On-site

$125K - $232K/yr

Establishes design concepts, criteria and engineering efforts for product research, development ... ASIC Engineering development, system and product qualification and NSA certification, low-rate ...

... programming, sponsor integration, and in-arena execution. Working collaboratively across multiple ... Design innovative fan engagement initiatives that combine storytelling, music, video, interactive ...

Partner closely with copy leads, developers, and cross-functional teams to shape content hierarchy ... Bachelor's degree in Graphic Design, Visual Communications, Advertising, Fine Arts, or a related ...

Showing results 21-40

Freelance Asic Rtl Design Engineer information

See Philadelphia, PA salary details

$15

$48

$133

How much do freelance asic rtl design engineer jobs pay per hour?

As of Sep 8, 2026, the average hourly pay for freelance asic rtl design engineer in Philadelphia, PA is $48.14, according to ZipRecruiter salary data. Most workers in this role earn between $24.52 and $62.36 per hour, depending on experience, location, and employer.

Are freelance ASIC RTL design engineers in demand?

Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this flexible work arrangement.

How much does a Freelance ASIC RTL Design Engineer make?

Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.

What are popular job titles related to Freelance Asic Rtl Design Engineer jobs in Philadelphia, PA?

For Freelance Asic Rtl Design Engineer jobs in Philadelphia, PA, the most frequently searched job titles are:

What job categories do people searching Freelance Asic Rtl Design Engineer jobs in Philadelphia, PA look for?

The top searched job categories for Freelance Asic Rtl Design Engineer jobs in Philadelphia, PA are:

What cities near Philadelphia, PA are hiring for Freelance Asic Rtl Design Engineer jobs?

Cities near Philadelphia, PA with the most Freelance Asic Rtl Design Engineer job openings:

Engineering Planner Project Engineer - Lockheed Martin

Polluxa, Inc.

King Of Prussia, PA • On-site

$100 - $125/hr

Other

This job post has expired today. Applications are no longer accepted.


Job description

Standard Job Description

Space is a critical domain, connecting our technologies, our security and our humanity. While others view space as a destination, we see it as a realm of possibilities, where we can do more — we can innovate, invest, inspire and integrate our capabilities to transform the future. At Lockheed Martin Space, we aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve. We’re creating future-ready solutions, focusing on resiliency and urgency through our 21st Century Security® vision. We’re erasing boundaries and forming partnerships across industries and around the world. We’re advancing spacecraft and the workforce to fuel the next generation. And we’re reimagining how space can connect us, ensuring security and prosperity. Join us in shaping a new era in space and find a career that's built for you. Please join us as an Engineering Planner (Project Engineer), where you will be working within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will have the opportunity to support a portfolio of over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. IN THIS ROLE, YOU WILL: Be responsible for proactively monitoring team member workloads, tracking progress against assigned tasks and labor capacity Prepare project metrics for analysis by Technical Leads and Management. Drive advanced features of project planning and tracking tools, such as MS Project and Jira. Assist with proposal creation, leveraging data from past projects. Set up development and project tracking infrastructure for the development team to ensure consistency and completeness. Evolve department data collection and analysis from multiple tools into unified database. Assist with administrative tasks, such as contractor onboarding, status collection, operations reviews, etc as outlined by Management. Communicate well with ASIC/FPGA engineers, Technical Leads and Managers, understanding the vernacular and lifecycle of semiconductor development.

Coordinates planning, organization, control, integration and completion of engineering projects within area of assigned responsibility. Plans and formulates engineering program; reviews product design for compliance with engineering principles, company standards, customer contract requirements, and related specifications. Evaluates and approves design changes, specification and drawing releases. Coordinates activities concerned with technical developments, scheduling, and resolving engineering design and test problems.

Basic Qualifications
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