FPGA Engineer
$125K - $161K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$125K - $161K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$125K - $161K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
Los Angeles, CA · Hybrid
$175K - $225K/yr
FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... Provide support to the RF and Software Engineering teams. * Perform other related duties of which ...
Los Angeles, CA · Hybrid
$175K - $225K/yr
FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... Provide support to the RF and Software Engineering teams. * Perform other related duties of which ...
$128K - $165K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$128K - $165K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$124K - $160K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$124K - $160K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$126K - $163K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$126K - $163K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$126K - $162K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$126K - $162K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$123K - $158K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$123K - $158K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$133K - $171K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$133K - $171K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
Irvine, CA · Hybrid
$175K - $225K/yr
FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... Provide support to the RF and Software Engineering teams. * Perform other related duties of which ...
Irvine, CA · Hybrid
$175K - $225K/yr
FPGA Design Engineers are responsible for the efficient implementation of novel signal processing ... Provide support to the RF and Software Engineering teams. * Perform other related duties of which ...
$110K - $142K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$110K - $142K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$131K - $168K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$131K - $168K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
Chinquapin, NC · On-site
$109K - $150K/yr
Lead FPGA engineering, digital verification, HW/SW integration, and validation teams. Ensure adherence to best practices in RTL. * Transfer technical expertise , mentor engineers, and establish ...
Chinquapin, NC · On-site
$109K - $150K/yr
Lead FPGA engineering, digital verification, HW/SW integration, and validation teams. Ensure adherence to best practices in RTL. * Transfer technical expertise , mentor engineers, and establish ...
$118K - $152K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$118K - $152K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$128K - $164K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$128K - $164K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$128K - $165K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$128K - $165K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
Chicago, IL · On-site
$133K - $172K/yr
Qualifications: - Bachelor's in Electrical Engineering, Computer Engineering, Computer Science or equivalent. - 1+ years of experience in FPGA Design including hardware architecture, simulation ...
Chicago, IL · On-site
$133K - $172K/yr
Qualifications: - Bachelor's in Electrical Engineering, Computer Engineering, Computer Science or equivalent. - 1+ years of experience in FPGA Design including hardware architecture, simulation ...
Owego, NY · On-site
$60 - $80/hr
Work with systems, RF/analog, digital, and ASIC/FPGA engineering teams to develop next-generation products. * Support design, simulation, integration, and test of complex high-speed systems.
Quick apply
Owego, NY · On-site
$60 - $80/hr
Work with systems, RF/analog, digital, and ASIC/FPGA engineering teams to develop next-generation products. * Support design, simulation, integration, and test of complex high-speed systems.
$148K - $190K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$148K - $190K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$126K - $162K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
$126K - $162K/yr
... engineering, cocotb, pyuvm Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the ...
Los Angeles, CA · On-site
$125K - $195K/yr
Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields. * Minimum 6 years of demonstrated experience in FPGA design; OR 4 years of FPGA design experience with a ...
Los Angeles, CA · On-site
$125K - $195K/yr
Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields. * Minimum 6 years of demonstrated experience in FPGA design; OR 4 years of FPGA design experience with a ...
$85K - $95.3K
1% of jobs
$95.3K - $105.6K
4% of jobs
$105.6K - $116K
6% of jobs
$116K - $126.3K
9% of jobs
$128.4K is the 25th percentile. Wages below this are outliers.
$126.3K - $136.6K
23% of jobs
The median wage is $141.4K / yr.
$136.6K - $146.9K
14% of jobs
$146.9K - $157.2K
10% of jobs
$163.2K is the 75th percentile. Wages above this are outliers.
$157.2K - $167.5K
14% of jobs
$167.5K - $177.9K
11% of jobs
$177.9K - $188.2K
5% of jobs
$188.2K - $198.5K
3% of jobs
$85K
$147.3K
$198.5K

Apply Now
RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System Integration, Hardware Security, Xilinx, Simulation, IP core, Versal, Stratix, concept to deployment, Vivado, GHDL, Questa, Quartus Prime, Zynq, Agilex, AXI, ACE, Avalon, FPGA verification tools, reverse engineering, cocotb, pyuvm
Full Time
Travel required to 10%.
Must be able to apply for and maintain a U.S. Government Security Clearance
FPGA Engineer
The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications.
Key Responsibilities
FPGA Design and Development: Design and develop IP cores and FPGA configurations implementing the latest in leakage-resilient hardware cryptography algorithms using state-of-the-art FPGA hardware.
Modeling and Simulation: Use simulation tools and verification frameworks to ensure mathematically-correct logic before hardware deployment.
Hardware/Software Design: Work closely with other engineers to integrate FPGA designs with application software and embedded systems. Implement embedded software-based testing solutions where applicable to validate FPGA designs.
Performance Optimization: Optimize FPGA designs for timing, resource utilization, and throughput. Identify and resolve system bottlenecks.
Testing and Validation: Create comprehensive test and verification plans for FPGA components, conduct unit and integration testing, and validate hardware performance against requirements in a remote environment.
System Integration: Ensure seamless integration between internally-developed and third-party IP cores, FPGA designs, and embedded systems. Collaborate with other engineers to develop and maintain system-level architecture.
Troubleshooting and Debugging: Utilize debugging tools and techniques to diagnose and resolve issues within FPGA designs and hardware platforms.
Documentation: Prepare detailed documentation, including design specifications, testing protocols, and user guides, to support system development and maintenance.
Continuous Learning: Actively stay up-to-date with the latest advancements in FPGA technology and hardware security to continually refine and enhance system capabilities.
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Guided missile and space vehicle manufacturing
11 - 50 Employees
Washington, DC, US
2013