Senior Package Design Engineer
Boise, ID · On-site
Define and optimize package architectures for DRAM products, including substrate stack-up, die padlog optimization, wire bond and flip chip interconnect schemes, and BEOL/RDL flows for advanced ...
Boise, ID · On-site
Define and optimize package architectures for DRAM products, including substrate stack-up, die padlog optimization, wire bond and flip chip interconnect schemes, and BEOL/RDL flows for advanced ...
Boise, ID · On-site
Define and optimize package architectures for DRAM products, including substrate stack-up, die padlog optimization, wire bond and flip chip interconnect schemes, and BEOL/RDL flows for advanced ...
Santa Clara, CA · On-site
$138K - $190K/yr
Experience with flip-chip and bumping technologies * Understanding of thermal, stress, and electrical considerations in package design * Hands-on experience with CAD software (AutoCAD preferred but ...
Quick apply
Santa Clara, CA · On-site
$138K - $190K/yr
Experience with flip-chip and bumping technologies * Understanding of thermal, stress, and electrical considerations in package design * Hands-on experience with CAD software (AutoCAD preferred but ...
Experience with Flip Chip Bonding, flux dispense, underfill dispense, profilometry, optical microscope inspection and related operations. * Familiar with probe station and experience of electrical ...
Experience with Flip Chip Bonding, flux dispense, underfill dispense, profilometry, optical microscope inspection and related operations. * Familiar with probe station and experience of electrical ...
Austin, TX · On-site
$25 - $31/hr
Operate equipment, such as flip-chip bonders and laser welders * Execute equipment maintenance and calibration * Package final products for delivery * Maintain parts inventory * Run functional ...
Austin, TX · On-site
$25 - $31/hr
Operate equipment, such as flip-chip bonders and laser welders * Execute equipment maintenance and calibration * Package final products for delivery * Maintain parts inventory * Run functional ...
San Francisco, CA · On-site
$122K - $164K/yr
Some hands-on knowledge in Wafer Bumping, Manufacturing assembly processes; such as wafer back-grind, wafer dicing, Flip Chip die attach (including multilayer thin die stacking), encapsulation ...
San Francisco, CA · On-site
$122K - $164K/yr
Some hands-on knowledge in Wafer Bumping, Manufacturing assembly processes; such as wafer back-grind, wafer dicing, Flip Chip die attach (including multilayer thin die stacking), encapsulation ...
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
Quick apply
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
Florham Park, NJ · Hybrid
$109K - $150K/yr
Design PICs with packaging in mind -- fiber coupling, electrical fanout (wirebond and flip-chip), thermal, and mechanical constraints * Contribute to optical system and link-level design and trade ...
Florham Park, NJ · Hybrid
$109K - $150K/yr
Design PICs with packaging in mind -- fiber coupling, electrical fanout (wirebond and flip-chip), thermal, and mechanical constraints * Contribute to optical system and link-level design and trade ...
Florham Park, NJ · On-site
$175K - $184K/yr
Design PICs with packaging in mind - fiber coupling, electrical fanout (wirebond and flip-chip), thermal, and mechanical constraints * Contribute to optical system and link-level design and trade ...
Florham Park, NJ · On-site
$175K - $184K/yr
Design PICs with packaging in mind - fiber coupling, electrical fanout (wirebond and flip-chip), thermal, and mechanical constraints * Contribute to optical system and link-level design and trade ...
Phoenix, AZ · On-site
$98/hr
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
Phoenix, AZ · On-site
$98/hr
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
Experience with advanced packaging of photonic integrated circuits such as hybrid or flip-chip integration Contact: * Mike Gould (mike@ayoelectronics.com)
New
Quick apply
Experience with advanced packaging of photonic integrated circuits such as hybrid or flip-chip integration Contact: * Mike Gould (mike@ayoelectronics.com)
New
San Jose, CA · On-site
$159K - $230K/yr
Optimize packaging and test architectures for performance, cost, and reliability: flip-chip BGA, high-pin-count packages, substrate technologies, wafer-level solutions, burn-in/FT coverage. * Monitor ...
San Jose, CA · On-site
$159K - $230K/yr
Optimize packaging and test architectures for performance, cost, and reliability: flip-chip BGA, high-pin-count packages, substrate technologies, wafer-level solutions, burn-in/FT coverage. * Monitor ...
$159K - $230K/yr
Optimize packaging and test architectures for performance, cost, and reliability: flip-chip BGA, high-pin-count packages, substrate technologies, wafer-level solutions, burn-in/FT coverage. * Monitor ...
$159K - $230K/yr
Optimize packaging and test architectures for performance, cost, and reliability: flip-chip BGA, high-pin-count packages, substrate technologies, wafer-level solutions, burn-in/FT coverage. * Monitor ...
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
San Diego, CA · On-site
Extensive expertise in Flip Chip, Wire Bond, and System in Package (SiP) assembly processes, as well as familiarity with related materials and equipment, is required. The role demands strong ...
San Diego, CA · On-site
Extensive expertise in Flip Chip, Wire Bond, and System in Package (SiP) assembly processes, as well as familiarity with related materials and equipment, is required. The role demands strong ...
Phoenix, AZ · On-site +1
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) • Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
Phoenix, AZ · On-site +1
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) • Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
This includes power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias ...
Design, develop, and qualify IC packaging technologies including flip-chip, wire bonding, wafer-level packaging (WLP), QFN, CSP, and LGA * Evaluate and select packaging materials (substrates, mold ...
Design, develop, and qualify IC packaging technologies including flip-chip, wire bonding, wafer-level packaging (WLP), QFN, CSP, and LGA * Evaluate and select packaging materials (substrates, mold ...
Tempe, AZ · On-site
Promote Amkor package technologies directly to new and existing customers to find potential applications, deploying the flip chip package portfolio with key customers to gain business. * Work closely ...
Tempe, AZ · On-site
Promote Amkor package technologies directly to new and existing customers to find potential applications, deploying the flip chip package portfolio with key customers to gain business. * Work closely ...
San Francisco, CA · On-site
$117K - $161K/yr
Familiar with High Density Interconnect (HDI) PCB and Flip-Chip (FC) BGA package substrate technologies. Ability to work and communicate effectively in a multi-functional team.
San Francisco, CA · On-site
$117K - $161K/yr
Familiar with High Density Interconnect (HDI) PCB and Flip-Chip (FC) BGA package substrate technologies. Ability to work and communicate effectively in a multi-functional team.
San Francisco, CA · On-site
$117K - $161K/yr
Familiar with High Density Interconnect (HDI) PCB and Flip-Chip (FC) BGA package substrate technologies. Ability to work and communicate effectively in a multi-functional team.
San Francisco, CA · On-site
$117K - $161K/yr
Familiar with High Density Interconnect (HDI) PCB and Flip-Chip (FC) BGA package substrate technologies. Ability to work and communicate effectively in a multi-functional team.
$20K - $38K
15% of jobs
$38K - $56K
5% of jobs
$56K - $74K
2% of jobs
$74K - $92K
1% of jobs
$92K - $110K
1% of jobs
$111.5K is the 25th percentile. Wages below this are outliers.
$110K - $128K
9% of jobs
$128K - $146K
14% of jobs
The median wage is $148.3K / yr.
$146K - $164K
21% of jobs
$178.1K is the 75th percentile. Wages above this are outliers.
$164K - $182K
8% of jobs
$182K - $200K
12% of jobs
$200K - $218K
12% of jobs
$20K
$135.7K
$218K
One of the main challenges in a Flip Chip process engineering position is maintaining high yields and reliability while working with ever-decreasing component sizes and complex assembly processes. Engineers must troubleshoot defects, optimize process parameters, and stay updated with evolving industry technologies. The role often involves cross-functional collaboration with design, quality, and production teams to ensure product integrity. Overcoming these challenges helps build expertise in advanced microelectronic packaging and can position you for advancement within the semiconductor manufacturing industry.
A Flip Chip job typically involves working with advanced semiconductor packaging technology, where components are flipped and directly bonded to a substrate or circuit board. Responsibilities may include operating equipment, inspecting wafer bonding, troubleshooting defects, and ensuring quality control. Workers in this role are often found in semiconductor manufacturing and may need experience with cleanroom environments, precision tools, and microscopy techniques.
To thrive in a Flip Chip process engineering role, you need a strong understanding of semiconductor packaging, microelectronics assembly, and materials science, often supported by a degree in electrical engineering, materials science, or a related field. Experience with tools such as wire bonders, die attachers, flip chip bonders, and knowledge of cleanroom protocols and industry standards like IPC is highly valuable. Attention to detail, problem-solving ability, and excellent teamwork are crucial soft skills for this position. These competencies ensure successful assembly, reliability, and performance of advanced semiconductor devices in a fast-paced and precise manufacturing environment.

Full-time
Medical, Dental, Vision, PTO
Posted 16 days ago
8.7
Based on 39 frontline employees who took The Breakroom Quiz
11th of 139 rated electronics manufacturers
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
The Global Design, Simulation, and Substrate team at Micron Technology is a world-class group of engineers developing advanced semiconductor packaging solutions for memory products including DRAM and NAND. The team operates globally, collaborating with internal assembly sites, technology development teams, and external OSAT partners to deliver high-performance, reliable, and manufacturable package designs across Micron's product portfolio!
As a Senior Package Design Engineer, you will lead co-design activities that bridge silicon design, package architecture, and product development for advanced DRAM and memory products targeting applications such as Mobile, Automotive, Artificial Intelligence, Edge/Cloud Computing, and Data Center. During the co-design phase, you will partner with silicon design teams, Business Units, customer-facing teams, and package and product architecture teams to define and drive new product concepts from inception through High Volume Manufacturing (HVM). Be part of the team! You will collaborate with global, multi-functional teams - including Package Architecture, Technology Development, simulation, and manufacturing - to deliver scalable, high-performance package solutions that meet electrical, mechanical, thermal, and reliability requirements.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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To learn more about Micron, please visit micron.com/careers
For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
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Semiconductor and electronic component manufacturing
10,000+ Employees
Boise, ID, US
2019