You will apply your CSP technical expertise to lead root cause investigations on flip chip, die attach, molding, and plating processes, partnering closely with process engineering, operations ...
You will apply your CSP technical expertise to lead root cause investigations on flip chip, die attach, molding, and plating processes, partnering closely with process engineering, operations ...
You will apply your CSP technical expertise to lead root cause investigations on flip chip, die attach, molding, and plating processes, partnering closely with process engineering, operations ...
You will apply your CSP technical expertise to lead root cause investigations on flip chip, die attach, molding, and plating processes, partnering closely with process engineering, operations ...
... Flip Chip, FO-WLP, and interposers Utilize modeling and simulation (thermal, mechanical, electrical) to ensure early-stage design success Provide technical oversight to external vendors and ...
... Flip Chip, FO-WLP, and interposers Utilize modeling and simulation (thermal, mechanical, electrical) to ensure early-stage design success Provide technical oversight to external vendors and ...
Package Design Engineer
Austin, TX · On-site
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Package Design Engineer
Austin, TX · On-site
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Package Design Engineer
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Package Design Engineer
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Develop and qualify new package types and assembly processes and flows including die attach, wire bond, flip-chip, molding, plating, soldering and encapsulation * Define manufacturing process flows ...
Develop and qualify new package types and assembly processes and flows including die attach, wire bond, flip-chip, molding, plating, soldering and encapsulation * Define manufacturing process flows ...
Flip-chip package design concepts. * Tasks: * Perform point-to-point connections . * Run DRC (Design Rule Checks) , identify root causes, and fix issues. * Execute design based on provided schematics ...
Quick apply
Flip-chip package design concepts. * Tasks: * Perform point-to-point connections . * Run DRC (Design Rule Checks) , identify root causes, and fix issues. * Execute design based on provided schematics ...
High-density interposers, substrates, and PCB layouts: power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density ...
High-density interposers, substrates, and PCB layouts: power, digital, analog, and RF signals across multiple die (primarily flip-chip) * Hands on high-speed, multi-layer packaging, high-density ...
Advanced Packaging Engineer
Saratoga, CA · On-site
$230K - $275K/yr
This role also owns leading flip-chip single-die Flip Chip packages and advanced 2.5D integration. You will operate as the technical owner of system module packaging, working hands-on with contract ...
Advanced Packaging Engineer
Saratoga, CA · On-site
$230K - $275K/yr
This role also owns leading flip-chip single-die Flip Chip packages and advanced 2.5D integration. You will operate as the technical owner of system module packaging, working hands-on with contract ...
Develop and qualify new package types and assembly processes and flows including die attach, wire bond, flip-chip, molding, plating, soldering and encapsulation * Define manufacturing process flows ...
Develop and qualify new package types and assembly processes and flows including die attach, wire bond, flip-chip, molding, plating, soldering and encapsulation * Define manufacturing process flows ...
Develop new technologies and establish baselines for assembly and packaging including wafer grinding, wafer dicing, lithography, lamination, plating, etching, SMT, flip chip, bonding, molding ...
Develop new technologies and establish baselines for assembly and packaging including wafer grinding, wafer dicing, lithography, lamination, plating, etching, SMT, flip chip, bonding, molding ...
Package Design Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Package Design Engineer
San Jose, CA · On-site
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Package Design Engineer
Fort Collins, CO · On-site
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Package Design Engineer
Fort Collins, CO · On-site
$141K - $226K/yr
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part ...
Postdoctoral Fellow (PREP0004276)
Gaithersburg, MD · On-site
$53K - $72K/yr
The main responsibilities are: • Fabricate Si, SiO2, SiN chips for flip-chip fusion and hybrid bonding experiments. • Optimize and maintain fabrication processes, including chip handling and ...
Postdoctoral Fellow (PREP0004276)
Gaithersburg, MD · On-site
$53K - $72K/yr
The main responsibilities are: • Fabricate Si, SiO2, SiN chips for flip-chip fusion and hybrid bonding experiments. • Optimize and maintain fabrication processes, including chip handling and ...
The role requires expertise in the assembly processes required for fully packaged, single die flip chip LGA, multi-chip modules (MCM) and System-in-Package devices. Assembly processing includes paste ...
The role requires expertise in the assembly processes required for fully packaged, single die flip chip LGA, multi-chip modules (MCM) and System-in-Package devices. Assembly processing includes paste ...
Sr Staff Semiconductor Process Engineer
Goleta, CA · On-site
$112K - $145K/yr
... flip-chip bonding for hybridization, a key step in the manufacturing process imaging devices. You will play a critical role in developing and optimizing the processes, procedures, tooling, and ...
Sr Staff Semiconductor Process Engineer
Goleta, CA · On-site
$112K - $145K/yr
... flip-chip bonding for hybridization, a key step in the manufacturing process imaging devices. You will play a critical role in developing and optimizing the processes, procedures, tooling, and ...
Packaging Process Development Engineer
Fremont, CA · On-site
$94K - $130K/yr
Develop and qualify new package types and assembly processes and flows including die attach, wire bond, flip-chip, molding, plating, soldering and encapsulation * Define manufacturing process flows ...
Packaging Process Development Engineer
Fremont, CA · On-site
$94K - $130K/yr
Develop and qualify new package types and assembly processes and flows including die attach, wire bond, flip-chip, molding, plating, soldering and encapsulation * Define manufacturing process flows ...
The role requires expertise in the assembly processes required for fully packaged, single die flip chip LGA, multi-chip modules (MCM) and System-in-Package devices. Assembly processing includes paste ...
The role requires expertise in the assembly processes required for fully packaged, single die flip chip LGA, multi-chip modules (MCM) and System-in-Package devices. Assembly processing includes paste ...
Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers * Ensure early success in package development with modeling and simulation for thermal ...
Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers * Ensure early success in package development with modeling and simulation for thermal ...
The role requires expertise in the assembly processes required for fully packaged, single die flip chip LGA, multi-chip modules (MCM) and System-in-Package devices. Assembly processing includes paste ...
The role requires expertise in the assembly processes required for fully packaged, single die flip chip LGA, multi-chip modules (MCM) and System-in-Package devices. Assembly processing includes paste ...
Flip Chip information
See salary details
$20K - $38K
15% of jobs
$38K - $56K
5% of jobs
$56K - $74K
2% of jobs
$74K - $92K
1% of jobs
$92K - $110K
1% of jobs
$111.5K is the 25th percentile. Wages below this are outliers.
$110K - $128K
9% of jobs
$128K - $146K
14% of jobs
The median wage is $148.3K / yr.
$146K - $164K
21% of jobs
$178.1K is the 75th percentile. Wages above this are outliers.
$164K - $182K
8% of jobs
$182K - $200K
12% of jobs
$200K - $218K
12% of jobs
$20K
$135.7K
$218K
How much do flip chip jobs pay per year?
What are common challenges faced in a Flip Chip engineering role?
One of the main challenges in a Flip Chip process engineering position is maintaining high yields and reliability while working with ever-decreasing component sizes and complex assembly processes. Engineers must troubleshoot defects, optimize process parameters, and stay updated with evolving industry technologies. The role often involves cross-functional collaboration with design, quality, and production teams to ensure product integrity. Overcoming these challenges helps build expertise in advanced microelectronic packaging and can position you for advancement within the semiconductor manufacturing industry.
What is a Flip Chip job?
A Flip Chip job typically involves working with advanced semiconductor packaging technology, where components are flipped and directly bonded to a substrate or circuit board. Responsibilities may include operating equipment, inspecting wafer bonding, troubleshooting defects, and ensuring quality control. Workers in this role are often found in semiconductor manufacturing and may need experience with cleanroom environments, precision tools, and microscopy techniques.
What are the key skills and qualifications needed to thrive in the Flip Chip position, and why are they important?
To thrive in a Flip Chip process engineering role, you need a strong understanding of semiconductor packaging, microelectronics assembly, and materials science, often supported by a degree in electrical engineering, materials science, or a related field. Experience with tools such as wire bonders, die attachers, flip chip bonders, and knowledge of cleanroom protocols and industry standards like IPC is highly valuable. Attention to detail, problem-solving ability, and excellent teamwork are crucial soft skills for this position. These competencies ensure successful assembly, reliability, and performance of advanced semiconductor devices in a fast-paced and precise manufacturing environment.

Full-time
Posted 28 days ago
Job description
Our Team:
Semtech Corporation (NASDAQ:SMTC; www.semtech.com) is a leading supplier of high-quality semiconductor products. Semtech's Analog Mixed Signal and Wireless (AMW) Business Unit develops a broad portfolio of high-performance semiconductor solutions that power, protect, and connect modern electronics. The group's products span circuit protection devices that shield sensitive systems from voltage spikes and electrical overstress, RF solutions serving industrial, medical, and communications applications, advanced power management ICs including switching regulators and wireless charging solutions, and specialized sensing technologies. AMW's innovations are embedded across some of the fastest-growing markets today - from mobile and consumer devices to industrial automation, medical equipment, and connected infrastructure - making it a critical driver of Semtech's mission to make the world safer, more productive, and more sustainable.
The Quality team at our Colorado Springs backend assembly site manages ISO 9001 certification and IATF 16949 transition, supporting chip-scale packaging operations including flip chip, wafer-level CSP, die attach, molding, and plating processes. We handle internal and external audits, process characterization, document control, and calibration - supporting two manufacturing sites and more than 1,000 controlled documents.
Job Summary:
We are seeking an experienced Quality Process Engineer with chip-scale packaging (CSP) expertise to drive corrective action closure and technical problem-solving across our Colorado Springs backend assembly operations. This role sits at the intersection of quality engineering and process engineering - combining deep technical knowledge of semiconductor packaging with structured problem-solving to eliminate chronic open corrective actions.
You will apply your CSP technical expertise to lead root cause investigations on flip chip, die attach, molding, and plating processes, partnering closely with process engineering, operations, maintenance, and systems engineering teams to diagnose recurring issues and deliver durable solutions. Your technical credibility in semiconductor packaging will enable you to influence cross-functional teams, facilitate collaborative problem-solving sessions, and ensure corrective actions address true root causes rather than symptoms.
Over time, this role may also contribute to quality system auditing as the team scales. If you thrive on applying deep technical knowledge to untangle complex manufacturing problems, influencing engineering teams through data-driven persuasion, and bringing order to ambiguity, this is your role.
Responsibilities:
Corrective Action Leadership (50%)
- Own and drive closure of 70+ open corrective action reports (CARs) across engineering, operations, maintenance, and systems engineering through technical problem-solving and cross-functional collaboration
- Lead cross-functional CAR review sessions, bringing together relevant stakeholders to solve problems comprehensively rather than superficially
- Apply 8D methodology, 5-Why, fishbone, and fault tree analysis combined with CSP technical knowledge to identify true root causes in packaging processes
- Design and execute Design of Experiments (DOE) to identify root causes of process variability and validate corrective actions
- Track CAR closure progress and provide regular status reporting to Quality Director and site leadership
- Verify effectiveness of implemented corrective actions through statistical analysis and follow-up validation
- Identify systemic patterns across open CARs to prioritize high-impact interventions and prevent recurrence
Chip-Scale Packaging & Process Quality (40%)
- Support qualification and validation of chip-scale packaging processes including flip chip, wafer-level CSP, die attach, molding, and plating operations
- Investigate and resolve quality issues related to packaging processes including solder joint integrity, die cracking, underfill defects, warpage, and assembly yield
- Apply Statistical Process Control (SPC) methodologies to monitor critical process parameters and process capability (Cpk/Ppk) for packaging operations
- Perform Measurement System Analysis (MSA) and Gage R&R studies to validate inspection and test equipment capability
- Support new product introduction (NPI) through process validation (IQ/OQ/PQ), first article inspection (FAI), and production readiness activities
- Develop and maintain Process FMEAs (pFMEA), Control Plans, and process documentation for packaging operations
- Conduct device characterization and reliability testing to support process optimization and validation
Quality Systems & Supplier Quality (10%)
- Support maintenance of ISO 9001 quality management system; contribute to IATF 16949 automotive standards transition
- Participate in internal and external audits as technical subject matter expert; audit ownership capability is a plus
- Review and approve quality documentation including procedures, work instructions, and process specifications
- Manage supplier non-conformances (SCARs) and corrective action follow-through as needed
Minimum Qualifications:
- Bachelor's degree in Engineering, Materials Science, Physics, or related technical field
- 5+ years of quality engineering experience in semiconductor backend assembly or microelectronics packaging
- Direct hands-on experience with chip-scale packaging technologies including flip chip, wafer-level CSP, or advanced packaging processes
- Demonstrated expertise in 8D methodology, root cause analysis (5-Why, fishbone, fault tree), and structured problem-solving
- Strong statistical analysis skills including SPC, process capability (Cpk/Ppk), hypothesis testing, and Design of Experiments (DOE)
- Working knowledge of AIAG Core Tools: PFMEA, Control Plans, MSA, PPAP, and APQP
- Experience with ISO 9001 or equivalent quality management systems
- Proficiency with statistical analysis software (Minitab, JMP, or equivalent) and Microsoft Office suite
- Excellent written and verbal communication skills with ability to influence across organizational levels
- Proven track record of building collaborative relationships with engineering, manufacturing, and supplier organizations
Desired Qualifications:
- Master's degree in Materials Science, Engineering, or related technical field
- Six Sigma Green Belt or Black Belt certification
- Certified Quality Engineer (CQE) or Certified Quality Auditor (CQA) from ASQ
- ISO 9001 or IATF 16949 Lead Auditor certification
- Experience with wafer fabrication processes (etch, PVD, lithography, thin films) to support packaging integration
- Direct experience with flip chip bumping, redistribution layer (RDL) processes, or advanced wafer-level packaging
- Supplier quality experience with OSATs (Outsourced Semiconductor Assembly and Test) or foundries
- Familiarity with automotive (IATF 16949), aerospace (AS9100), or medical device (ISO 13485) quality standards
- Experience with reliability testing including temperature cycling, HAST, HTOL, and failure analysis techniques
- Knowledge of semiconductor metrology and characterization techniques (SEM, X-ray, C-SAM, profilometry)
- Advanced DOE expertise including fractional factorial, response surface methodology, and Taguchi methods
- Experience with MES systems and quality data management platforms
The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job. Incumbents may be required to perform job-related tasks other than those specifically included in this description.
All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.
We are proud to be an EEO employer M/F/D/V. We maintain a drug-free workplace.
A reasonable estimate of the pay range for this position is $ 75,000 to $115,000 USD. There are several factors taken into consideration in determining base salary, including but not limited to: job-related qualifications, skills, education and experience, as well as job location and the value of other elements of an employee's total compensation package.
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About Semtech
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
1,001 - 5,000 Employees
Headquarters location
Camarillo, CA, US
Year founded
1960