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Technical Manager, Server SoC Platform Emulation
THE ROLE:
We are seeking a passionate, results-driven, and innovative engineering leader to manage, lead, and develop an SoC Platform Emulation team. This team plays a critical role across both pre-silicon and post-silicon phases, working closely with Design, Firmware/Software, and Post-Silicon Validation teams to shift left post-silicon validation into the pre-silicon emulation phase.
The team is responsible for end-to-end HW+FW co-verification, validating design and firmware together on platform-level emulation environments. By identifying design, firmware, and system-level issues early, the team enables higher-quality silicon, faster post-silicon bring-up, and reduced post-silicon validation cycles, ultimately accelerating time-to-market and improving product robustness.
As a leader, you will drive cross-functional collaboration, define execution strategy, build and mentor a high-performing engineering team, and deliver scalable emulation workflows that support rapid silicon validation and long-term platform success.
THE PERSON:
The successful candidate is a passionate, technically strong, and execution-focused engineering leader with the ability to operate effectively across organizational boundaries. They demonstrate:

• Strong system-level thinking and technical judgment
• Proven people leadership, mentoring, and team-building skills
• Ability to influence without authority and drive cross-functional alignment
• Comfort operating in fast-paced, milestone-driven environments
• Clear communication skills with both technical teams and senior leadership

KEY RESPONSIBILITIES:

• Lead, manage, and develop an SoC Platform Emulation engineering team responsible for pre-silicon and post-silicon enablement across multiple SoC programs.
• Own and drive HW+FW co-verification strategy on platform emulation environments to identify design, firmware, and system-level issues early in the development cycle.
• Partner closely with Silicon Design, Firmware/Software, BIOS, and Post-Silicon Validation teams to shift-left post-silicon validation into pre-silicon emulation.
• Establish execution plans, priorities, and success metrics aligned with program milestones, tape-out schedules, and validation readiness.
• Drive validation planning and execution for each SoC program to achieve program breakthroughs and readiness goals.
• Review execution status, validation coverage, risks, and mitigation plans across multiple programs, and drive issues to closure.
• Provide technical leadership and system-level guidance, leveraging broad SoC and platform knowledge to resolve complex technical and cross-functional issues, even where day-to-day ownership resides with IP technical leads.
• Lead and participate hands-on in debugging complex system-level problems, demonstrating strong problem-solving skills and technical judgment.
• Drive continuous improvement in emulation infrastructure, workflows, coverage, and debug efficiency to improve product quality and reduce post-silicon bring-up time.
• In partnership with global validation leaders, identify, define, and implement improvements to post-silicon validation methodologies to increase efficiency, predictability, and product quality.
• Develop and drive the strategic direction for validation automation, based on team needs and program requirements.
• Manage a team of approximately 10 engineers, including hiring, mentoring, performance management, and technical and career development.
• Communicate execution status, risks, and outcomes to cross-functional partners and leadership in a clear, concise, and data-driven manner.

PREFERRED EXPERIENCE:

• Experience leading system-level or platform-level SoC emulation, or Pre Si verification/validation in a semiconductor environment.
• Strong understanding of SoC architecture, firmware/BIOS flows, and system software interactions.
• Hands-on experience with pre-silicon emulation platforms like Zebu, EP2, Palladium and understading of post-silicon validation environments to shift left post si workloads to emulation
• Proven background in HW+FW co-verification or integrated system validation.
• Experience working across global, multi-site engineering teams.
• Demonstrated success driving shift-left validation strategies or reducing post-silicon bring-up cycles.
• Prior people-management experience, including hiring, mentoring, and performance development.
• Ability to balance technical depth with execution discipline and delivery focus.

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in related discipline preferred

LOCATION:
Austin, TX
This role is not eligible for visa sponsorship.
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.