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Entry Level Asic Rtl Design Engineer Jobs in Michigan

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Entry Level Controls Engineer

Detroit, MI · On-site

$82K - $106K/yr

Entry Level Position: College Graduate - 2 years experience This is a broad opportunity to grow ... Design and develop electrical control systems that will interface with facility & building ...

New

Creative Solutions Group

Project Engineer

Clawson, MI · On-site

Design wiring schematics and custom PCBs using KiCad. * Integrate PLC and Arduino-based ... Open to entry-level candidates with the right mindset and learning ability. We are willing to train ...

Actalent

CAD Designer (Entry-level)

Ann Arbor, MI

$23 - $27/hr

Support professional engineers and technical staff by preparing, updating, and revising CAD drawings and design deliverables. * Perform redline work by incorporating markups and changes into existing ...

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Entry Level Asic Rtl Design Engineer information

What are some typical challenges faced by Entry Level ASIC RTL Design Engineers in their first year, and how can they overcome them?

Entry Level ASIC RTL Design Engineers often encounter challenges such as understanding complex design specifications, learning company-specific design flows and tools, and debugging RTL code efficiently. Collaborating closely with senior engineers and participating in code reviews can accelerate learning and help address these challenges. Additionally, taking initiative to study relevant documentation and seeking feedback regularly will help new engineers build confidence and technical competence in their role.

What does an Entry Level ASIC RTL Design Engineer do?

An Entry Level ASIC RTL (Register Transfer Level) Design Engineer is responsible for designing and developing the digital logic that forms the core of Application Specific Integrated Circuits (ASICs). They use hardware description languages like Verilog or VHDL to create and simulate circuit designs based on functional specifications. Their tasks often include coding, debugging, verification, and collaborating with senior engineers to ensure the design meets performance, power, and area requirements. This role is essential for bringing complex digital systems from concept to physical implementation in products such as processors, networking chips, and other specialized electronics.

What are the key skills and qualifications needed to thrive as an Entry Level ASIC RTL Design Engineer, and why are they important?

To thrive as an Entry Level ASIC RTL Design Engineer, you need a solid background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, and understanding of simulation, synthesis, and verification flows are commonly required. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help individuals excel in this role. These skills enable accurate and efficient hardware design, seamless integration with larger teams, and successful delivery of complex semiconductor products.

What is the difference between Entry Level Asic Rtl Design Engineer vs Digital Design Engineer?

AspectEntry Level Asic Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer Engineering; knowledge of HDL (Verilog/VHDL)Bachelor's in Electrical Engineering, Computer Engineering, or related; HDL knowledge often required
Work EnvironmentSemiconductor companies, chip design teams, hardware development labsElectronics companies, integrated circuit design teams, hardware development labs
Industry UsagePrimarily in ASIC/FPGA chip designIn digital hardware design across various sectors including consumer electronics and telecom

While both roles involve digital hardware design and HDL skills, the Entry Level Asic Rtl Design Engineer focuses specifically on ASIC chip development, whereas the Digital Design Engineer may work on a broader range of digital systems, including FPGA and other digital hardware projects.

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Entry Level Asic Rtl Design Engineer jobs near you
Infographic showing various Entry Level Asic Rtl Design Engineer job openings in Michigan as of July 2026, with employment types broken down into 91% Full Time, 4% Part Time, 3% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution.
Senior Digital & Mixed-Signal Verification Engineer

Senior Digital & Mixed-Signal Verification Engineer

Mythic

Ann Arbor, MI • Hybrid

$125K - $250K/yr

Full-time

Re-posted 12 days ago

Job description

About Us:
Mythic's platform delivers the power of desktop GPU in a single low-power chip, supporting inference for large deep neural networks. Mythic's technology is based upon an entirely new hybrid digital/analog flash calculation using non-volatile memory arrays which has been under development since 2012.  This step change in performance enables a range of new applications in many markets, including safety and security, autonomous vehicles, VR/AR, robotics, and media.  Mythic's AI hardware combines knowledge across many domains, including AI, compilers, computer architecture, analog circuits, and non-volatile memories. Mythic will enable the future of AI by building analog-compute hardware platforms that are 100-1000x more efficient than conventional all-digital systems
 
About the role:
We are looking for an experienced digital and mixed-signal verification engineer who excels working in large complex systems with and enjoys utilizing a broad set of skills. This person will do everything from RNM creation to verifying top-level algorithms, all while ensuring interfaces, specifications, and features are clear between multiple teams. This role is largely responsible for ensuring Mythic's analog compute core can be accurately and thoroughly verified by the digital and mixed-signal verification flow, and is expected to contribute to methodology.
Required experience includes:
  • Significant experience with verification of RNMs in mixed-signal / SoC verification
  • Extensive digital verification background 
  • UVM expertise
  • Verification (and ownership a plus) of RTL for mixed-signal controllers and FSMs (for Data Converters, PLLs, Power Converters, etc.)
  • Experience tracking and communicating mixed-signal interface requirements/specifications
  • Ability to work cross-functional teams with humility
  • Excellent communication skills, especially resolving ambiguity
Bonus attributes:
  • Project leadership experience
  • Experience in Virtuoso 
  • Cadence tool setup and infrastructure knowledge (reasonable ability to debug)
  • Strength in linux (reasonable ability to debug)
$125,000 - $250,000 a year
Salary will be dependent upon candidate experience and location
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