... emulation, and FPGA environments • Build and maintain verification infrastructure, including ... Programming skills in Perl/Python or SystemVerilog
... emulation, and FPGA environments • Build and maintain verification infrastructure, including ... Programming skills in Perl/Python or SystemVerilog
... emulation, and FPGA environments • Build and maintain verification infrastructure, including ... Programming skills in Perl/Python or SystemVerilog
... emulation, and FPGA environments • Build and maintain verification infrastructure, including ... Programming skills in Perl/Python or SystemVerilog
CPU Debug and Power Management Verification Engineer
Beaverton, OR · On-site
$141K/yr
Description We are seeking a highly motivated Design Verification Engineer to join our silicon ... emulation, and FPGA environments • Build and maintain verification infrastructure, including ...
CPU Debug and Power Management Verification Engineer
Beaverton, OR · On-site
$141K/yr
Description We are seeking a highly motivated Design Verification Engineer to join our silicon ... emulation, and FPGA environments • Build and maintain verification infrastructure, including ...
Senior ASIC Design Engineer
Beaverton, OR · On-site
Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... FPGA emulation. QUALIFICATIONS - * BA/MS degree and 5+ years of relevant work experience.
Senior ASIC Design Engineer
Beaverton, OR · On-site
Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... FPGA emulation. QUALIFICATIONS - * BA/MS degree and 5+ years of relevant work experience.
Sr. Principal System Firmware Authentication Engineer
Portland, OR · On-site
$126K - $167K/yr
Bring up and validate System Control Processor firmware across virtual platforms, emulation systems ... About You: * Bachelor's or master's degree in Computer Engineering, Electrical Engineering ...
Sr. Principal System Firmware Authentication Engineer
Portland, OR · On-site
$126K - $167K/yr
Bring up and validate System Control Processor firmware across virtual platforms, emulation systems ... About You: * Bachelor's or master's degree in Computer Engineering, Electrical Engineering ...
... Emulation, STA, and Physical Design teams - Collaborate with software and systems teams to ensure a high quality Preferred Qualifications Experience writing specifications and converting them to ...
... Emulation, STA, and Physical Design teams - Collaborate with software and systems teams to ensure a high quality Preferred Qualifications Experience writing specifications and converting them to ...
ASIC Design Engineer
Beaverton, OR · On-site
... Emulation, STA, and Physical Design teams - Collaborate with software and systems teams to ensure a high quality Minimum Qualifications BS and a minimum of 10 years relevant industry experience.
ASIC Design Engineer
Beaverton, OR · On-site
... Emulation, STA, and Physical Design teams - Collaborate with software and systems teams to ensure a high quality Minimum Qualifications BS and a minimum of 10 years relevant industry experience.
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
Senior Design Verification Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$122K - $232K/yr
Position Overview We are seeking experienced pre-silicon verification engineers who are passionate ... emulation platforms to validate these novel architectures. This role requires a full-stack ...
Senior Design Verification Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$122K - $232K/yr
Position Overview We are seeking experienced pre-silicon verification engineers who are passionate ... emulation platforms to validate these novel architectures. This role requires a full-stack ...
Senior Design Verification Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$122K - $232K/yr
Position Overview We are seeking experienced pre-silicon verification engineers who are passionate ... emulation platforms to validate these novel architectures. This role requires a full-stack ...
Senior Design Verification Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$122K - $232K/yr
Position Overview We are seeking experienced pre-silicon verification engineers who are passionate ... emulation platforms to validate these novel architectures. This role requires a full-stack ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
... simulation/emulation for functional verification • Performance exploration and correlation ... engineering team to implement and verify physical design on the aspects of timing, area ...
Design Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... emulation for verification technologies is a plus but not required
Design Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... emulation for verification technologies is a plus but not required
Design Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
... emulation for verification technologies is a plus but not required Minimum Qualifications BS degree in technical subject area and a minimum 10 years relevant industry experience.
Design Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
... emulation for verification technologies is a plus but not required Minimum Qualifications BS degree in technical subject area and a minimum 10 years relevant industry experience.
Design Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
... emulation for verification technologies is a plus but not required Minimum Qualifications Minimum requirement of a bachelors degree
Design Verification Engineer
Beaverton, OR · On-site
$141K - $172K/yr
... emulation for verification technologies is a plus but not required Minimum Qualifications Minimum requirement of a bachelors degree
Emulation Engineer information
See Oregon salary details
$41.2K - $50.7K
3% of jobs
$50.7K - $60.2K
3% of jobs
$60.2K - $69.6K
4% of jobs
$69.6K - $79.1K
7% of jobs
$79.1K - $88.6K
6% of jobs
$89.4K is the 25th percentile. Wages below this are outliers.
$88.6K - $98K
6% of jobs
The median wage is $106.6K / yr.
$98K - $107.5K
21% of jobs
$107.5K - $117K
4% of jobs
$123.1K is the 75th percentile. Wages above this are outliers.
$117K - $126.4K
29% of jobs
$126.4K - $135.9K
2% of jobs
$135.9K - $145.4K
13% of jobs
$41.2K
$107.6K
$145.4K
How much do emulation engineer jobs pay per year?
As of Sep 13, 2026, the average yearly pay for emulation engineer in Oregon is $107,581.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,800.00 and $123,200.00 per year, depending on experience, location, and employer.
What does an emulation engineer do?
An Emulation Engineer specializes in developing and utilizing hardware emulation platforms to validate and verify complex semiconductor designs before fabrication. They create test environments, debug hardware-software interactions, and optimize performance using FPGA-based or commercial emulation systems. Their work helps detect design flaws early, reducing development time and costs. Emulation Engineers collaborate with verification, design, and software teams to ensure system functionality aligns with specifications.
What are the key skills and qualifications needed to thrive as an emulation engineer?
To excel as an Emulation Engineer, you need a strong background in computer engineering or electrical engineering, with expertise in hardware description languages (HDL) such as Verilog or VHDL, and a deep understanding of verification methodologies. Familiarity with emulation platforms like Cadence Palladium or Mentor Graphics Veloce, simulation tools, and scripting languages such as Python or Perl is highly valued, along with relevant certifications being a plus. Excellent problem-solving skills, attention to detail, and clear communication are important soft skills, especially when working in cross-functional teams. These abilities enable Emulation Engineers to efficiently debug complex systems, develop reliable models, and collaborate effectively to accelerate silicon development cycles.
What does a typical day look like for an emulation engineer?
A typical day for an Emulation Engineer involves setting up and maintaining emulation environments, debugging hardware and software integration issues, and collaborating with design and verification teams to run complex validation scenarios. You may spend time writing and modifying scripts, generating test cases, and analyzing results to ensure new silicon designs function accurately before fabrication. The role often requires proactive communication and coordination with hardware designers, software developers, and other engineering stakeholders. This dynamic environment allows you to develop specialized expertise, contribute to project milestones, and have a tangible impact on the efficiency and quality of product development.
What are the most commonly searched types of Emulation Engineer jobs in Oregon?
The most popular types of Emulation Engineer jobs in Oregon are:
What are popular job titles related to Emulation Engineer jobs in Oregon?
For Emulation Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Emulation Engineer jobs in Oregon look for?
The top searched job categories for Emulation Engineer jobs in Oregon are:
What cities in Oregon are hiring for Emulation Engineer jobs?
Cities in Oregon with the most Emulation Engineer job openings:
CPU Debug and Power Management Verification Engineer
Beaverton, OR
Apple
• Computer and Electronic Product Manufacturing • 10K+ employees10,000+ employees
$141K/yr
Full-time
Re-posted 5 days ago
Apple rating
8.1
Based on 684 frontline employees who took The Breakroom Quiz
Job description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!
In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Description
We are seeking a highly motivated Design Verification Engineer to join our silicon engineering team focused on the auxiliary features of a high-performance ARM-based CPU. These features include Power Management, Clock Control, Debug Infrastructure, Resets, and Special-Purpose Registers-spanning both ARM-standard capabilities and Apple-specific innovations.
• You will work across the entire product lifecycle, from pre-silicon test planning to supporting post-silicon bring-up and debug when needed. This role is highly cross-functional, bridging CPU and SoC teams, and is critical to delivering robust, low-power, high-performance CPU designs.
• Work closely with architecture and RTL designers on verifying the functionality correctness of CPU Power Management, clock control, and debug logic
• Develop and execute test plans and schedules
• Write and debug tests in Assembly, SystemVerilog, SVA, C++, and scripting languages to validate functionality in simulation, emulation, and FPGA environments
• Build and maintain verification infrastructure, including checkers, transactors, and coverage monitors.
• Analyze functional coverage to ensure test plan completeness
• Identify, root-cause, and document design issues and collaborate with RTL teams to drive fixes
• Support SoC-level debug for clock and power integration issues
• Work with silicon bring-up teams to develop tests and debug issues across emulation, FPGA, and silicon. Contribute to post-silicon debug, using waveform and trace tools to diagnose complex system issues.
Preferred Qualifications
Experience in processor or power management architecture and verification
Experience with system fabric protocols such as AXI
In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
Experience in processor debug features including hardware trace is a plus
Experience with advanced verification techniques such as formal verification is a plus
Advanced programming skills such as object orientated programming or CPU assembly language is a plus
Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort
Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Programming skills in Perl/Python or SystemVerilog
In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Description
We are seeking a highly motivated Design Verification Engineer to join our silicon engineering team focused on the auxiliary features of a high-performance ARM-based CPU. These features include Power Management, Clock Control, Debug Infrastructure, Resets, and Special-Purpose Registers-spanning both ARM-standard capabilities and Apple-specific innovations.
• You will work across the entire product lifecycle, from pre-silicon test planning to supporting post-silicon bring-up and debug when needed. This role is highly cross-functional, bridging CPU and SoC teams, and is critical to delivering robust, low-power, high-performance CPU designs.
• Work closely with architecture and RTL designers on verifying the functionality correctness of CPU Power Management, clock control, and debug logic
• Develop and execute test plans and schedules
• Write and debug tests in Assembly, SystemVerilog, SVA, C++, and scripting languages to validate functionality in simulation, emulation, and FPGA environments
• Build and maintain verification infrastructure, including checkers, transactors, and coverage monitors.
• Analyze functional coverage to ensure test plan completeness
• Identify, root-cause, and document design issues and collaborate with RTL teams to drive fixes
• Support SoC-level debug for clock and power integration issues
• Work with silicon bring-up teams to develop tests and debug issues across emulation, FPGA, and silicon. Contribute to post-silicon debug, using waveform and trace tools to diagnose complex system issues.
Preferred Qualifications
Experience in processor or power management architecture and verification
Experience with system fabric protocols such as AXI
In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
Experience in processor debug features including hardware trace is a plus
Experience with advanced verification techniques such as formal verification is a plus
Advanced programming skills such as object orientated programming or CPU assembly language is a plus
Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort
Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Programming skills in Perl/Python or SystemVerilog
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976