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Emulation Engineer Jobs in Oregon (NOW HIRING)

Senior ASIC Emulation Engineer

OR · On-site +1

$170K - $250K/yr

The Role We are seeking a Senior ASIC Emulation Engineer who will lead the bring-up, deployment, and optimization of our pre-silicon emulation platforms. You will work closely with architecture, RTL ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a member of the Emulation verification team, we play a key role in using Emulation for verification of large SoCs. The overall work will involve porting the design onto the Palladium ...

Description As a member of the Emulation verification team, we play a key role in using Emulation for verification of large SoCs. The overall work will involve porting the design onto the Palladium ...

Description As a member of the Emulation verification team, we play a key role in using Emulation for verification of large SoCs. The overall work will involve porting the design onto the Palladium ...

Description As a member of the Emulation verification team, we play a key role in using Emulation for verification of large SoCs. The overall work will involve porting the design onto the Palladium ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a member of the Emulation verification team, we play a key role in using Emulation for verification of large SoCs. The overall work will involve porting the design onto the Palladium ...

Director, SoC Design Engineering

Hillsboro, OR · On-site

$148K - $180K/yr

... emulation, and formal verification approaches, to validate complex SoC designs. - Develop and ... Qualifications: Minimum Qualifications - Bachelor's or BS degree in Electrical Engineering ...

AI Red Team Lead Engineer

Gresham, OR · On-site

$108K - $143K/yr

The AI Red Team Lead Engineer leads the execution and evolution of offensive security activities ... Design and execute AI-specific threat emulation aligned to real-world adversaries, misuse scenarios ...

SoC Verification Engineer

Hillsboro, OR · On-site

$141K - $200K/yr

Execute verification plans, including emulation and system simulation models, to ensure design ... Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to ...

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Emulation Engineer information

See Oregon salary details

$41.2K

$107.6K

$145.4K

How much do emulation engineer jobs pay per year?

As of Aug 23, 2026, the average yearly pay for emulation engineer in Oregon is $107,581.00, according to ZipRecruiter salary data. Most workers in this role earn between $88,800.00 and $123,200.00 per year, depending on experience, location, and employer.

What does an emulation engineer do?

An Emulation Engineer specializes in developing and utilizing hardware emulation platforms to validate and verify complex semiconductor designs before fabrication. They create test environments, debug hardware-software interactions, and optimize performance using FPGA-based or commercial emulation systems. Their work helps detect design flaws early, reducing development time and costs. Emulation Engineers collaborate with verification, design, and software teams to ensure system functionality aligns with specifications.

What are the key skills and qualifications needed to thrive as an emulation engineer?

To excel as an Emulation Engineer, you need a strong background in computer engineering or electrical engineering, with expertise in hardware description languages (HDL) such as Verilog or VHDL, and a deep understanding of verification methodologies. Familiarity with emulation platforms like Cadence Palladium or Mentor Graphics Veloce, simulation tools, and scripting languages such as Python or Perl is highly valued, along with relevant certifications being a plus. Excellent problem-solving skills, attention to detail, and clear communication are important soft skills, especially when working in cross-functional teams. These abilities enable Emulation Engineers to efficiently debug complex systems, develop reliable models, and collaborate effectively to accelerate silicon development cycles.

What does a typical day look like for an emulation engineer?

A typical day for an Emulation Engineer involves setting up and maintaining emulation environments, debugging hardware and software integration issues, and collaborating with design and verification teams to run complex validation scenarios. You may spend time writing and modifying scripts, generating test cases, and analyzing results to ensure new silicon designs function accurately before fabrication. The role often requires proactive communication and coordination with hardware designers, software developers, and other engineering stakeholders. This dynamic environment allows you to develop specialized expertise, contribute to project milestones, and have a tangible impact on the efficiency and quality of product development.

What are the most commonly searched types of Emulation Engineer jobs in Oregon?

The most popular types of Emulation Engineer jobs in Oregon are:

What are popular job titles related to Emulation Engineer jobs in Oregon?

For Emulation Engineer jobs in Oregon, the most frequently searched job titles are:

What job categories do people searching Emulation Engineer jobs in Oregon look for?

The top searched job categories for Emulation Engineer jobs in Oregon are:

What cities in Oregon are hiring for Emulation Engineer jobs?

Cities in Oregon with the most Emulation Engineer job openings:

Infographic showing various Emulation Engineer job openings in Oregon as of August 2026, with employment types broken down into 74% Full Time, and 26% Contract. Highlights an 100% In-person job distribution, with an average salary of $107,581 per year, or $51.7 per hour.

Senior ASIC Emulation Engineer

K2 Space

OR • On-site, Remote

$170K - $250K/yr

Full-time

Medical, Dental, Vision, Life, PTO

Posted 19 days ago


Job description

The Role

We are seeking a Senior ASIC Emulation Engineer who will lead the bring-up, deployment, and optimization of our pre-silicon emulation platforms. You will work closely with architecture, RTL design, DFT, DV, firmware, physical design, and silicon validation teams to enable highfidelity hardware/software co-development and accelerate verification cycles. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape firstgeneration silicon and system methodology.

Responsibilities

  • Build, integrate, and maintain full-chip, multi-chips and system-level emulation models on platforms such as Palladium, ZeBu, or Veloce.
  • Define and evolve emulation strategy, methodology, and workflows across the ASIC organization.
  • Work with RTL engineers to compile, map, and optimize designs for emulation performance, capacity, and stability.
  • Develop and integrate transactors, BFMs, speed adapters, and virtualization interfaces to support diverse system use cases.
  • Support systemlevel testing in emulation by enabling full hardware/software integration, validating complex use cases, and ensuring the environment can run representative endtoend workloads.
  • Accelerate overall verification throughput by helping DV team run targeted and highvalue tests in emulation, including adapting DV content and optimizing flows to reduce simulation bottlenecks.
  • Enable firmware, bootloader, driver, and software teams by providing robust emulation platforms and assisting in HW/SW integration debug.
  • Run emulation workloads, triage failures, perform root-cause analysis, and collaborate across design and verification to resolve issues.
  • Maintain and enhance automation for compile flows, regression management, and continuous integration.
  • Participate in architecture reviews, microarchitecture discussions, and influence design-for-emulation best practices.
  • Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and pre/post-silicon correlation.
  • Manage interactions with external IP providers or emulation partners when needed.

Qualifications

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of experience in ASIC/SoC development, focused on emulation
  • Solid understanding of SystemVerilog, digital logic, RTL flows, DV methodologies, and ASIC development lifecycles.
  • Hands-on expertise with major emulation platforms (Palladium, ZeBu, Veloce), including model build, debug and performance optimization
  • Proficiency with scripting languages (Python, Perl, TCL) for automation and tooling.
  • Experience with hardware/software interfaces, embedded processors, firmware bring-up, and C/C++based system-level testing.
  • Familiarity with industry-standard buses and protocols such as APB/AHB/AXI, JTAG, SPI.
  • Experience driving cross-functional debug involving RTL, DV, firmware, physical design, and validation teams.
  • Understanding of pre- and post-silicon debug methodologies and correlation workflows.

Nice to Have

  • Experience with FPGA prototyping platforms (HAPS, Protium, custom FPGA boards).
  • Experience with low-power modes and power-aware emulation.
  • Experience with analog/mixed-signal behavioral models in emulation environments.
  • Experience with SERDES and high-speed data protocols such as PCIe, Ethernet, USB, or multi-gigabit PHYs.

Compensation and Benefits:

  • Base salary range for this role is $170,000 - $250,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

K2 Space logo

About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022