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Eda Verification Engineer Jobs (NOW HIRING)

Normal Computing

Design Verification Engineer

New York, NY · On-site

$148K - $181K/yr

The Role As a Design Verification Engineer at Normal, you will verify our own physics-inspired ... Set up and evaluate EDA tools, ensuring usability and effective deployment on shared computing ...

Intel Corporation

Physical Verification Engineer

Phoenix, AZ · On-site

$135K/yr

... Verification Application Engineer provides specialized technical support to Intel Foundry Services ... StarRC, Quantus, or xACT EDA tools * Experience with major layout editing EDA tools and flows such ...

Intel

Physical Verification Engineer

Hillsboro, OR · On-site

$148K/yr

... Verification Application Engineer provides specialized technical support to Intel Foundry Services ... StarRC, Quantus, or xACT EDA tools * Experience with major layout editing EDA tools and flows such ...

Intel

Physical Verification Engineer

Phoenix, AZ · On-site

$135K/yr

... Verification Application Engineer provides specialized technical support to Intel Foundry Services ... StarRC, Quantus, or xACT EDA tools * Experience with major layout editing EDA tools and flows such ...

Intel

Physical Verification Engineer

Santa Clara, CA · On-site

$159K/yr

... Verification Application Engineer provides specialized technical support to Intel Foundry Services ... StarRC, Quantus, or xACT EDA tools * Experience with major layout editing EDA tools and flows such ...

Redolent, Inc.

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ... Experience with EDA tools (e.g., VCS, Questa, Verdi, SimVision). * Familiarity with scripting ...

Superbeo

Design Verification Lead Engineer

Austin, TX · On-site

Job Title : Design Verification Lead Engineer Job location: Austin, TX Job Duration: 3 Months ... UVM/System Verilog (Preference: 5) * Python (Preference: 3) * Synopsys/Cadence EDA Verification ...

INA Solution Inc

Design verification engineer

San Diego, CA · Remote

$139K - $169K/yr

Title: Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration ... Good knowledge of EDA tools. Experience with signal processing and FPGA based prototyping a plus.

Baya Systems

Hardware Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

DESIGN VERIFICATION ENGINEER SANTA CLARA, CA We are seeking a seasoned Design Verification designer ... Familiarity with industry-standard EDA tools for simulation and debug * Deep experience with UVM ...

INA Solution Inc

Design Verification Engineer

San Diego, CA · Remote

$139K - $169K/yr

Title: Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration ... Good knowledge of EDA tools. Experience with signal processing and FPGA based prototyping a plus.

Baya Systems

Hardware Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

DESIGN VERIFICATION ENGINEER AUSTIN, TX We are seeking a seasoned Design Verification designer with ... Familiarity with industry-standard EDA tools for simulation and debug * Deep experience with UVM ...

Mirafra Technology

Formal Verification Engineer

San Diego, CA · On-site

$144K/yr

... functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is ... Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management ...

Broadcom Inc.

Design Verification Engineer

Broomfield, CO · On-site

$108K - $172K/yr

Design Verification Engineer Broadcom's ASIC Products Division (APD) is looking for an experienced ... Collaborate closely with design teams and EDA vendors. * Analyze and debug simulation failures at ...

Talencore

Sr. RTL Verification Engineer

Redwood City, CA · On-site

$166K - $203K/yr

Develop and maintain RTL testbenches, benchmarks, and supporting EDA infrastructure. * Drive verification methodology adoption across the team and help onboard engineers from other domains to ...

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Eda Verification Engineer information

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$80K

$142.6K

$203.5K

How much do eda verification engineer jobs pay per year?

As of Sep 14, 2026, the average yearly pay for eda verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is an EDA Verification Engineer?

An EDA Verification Engineer is a professional who uses Electronic Design Automation (EDA) tools to verify the functionality and correctness of integrated circuit (IC) designs before manufacturing. Their primary responsibility is to ensure that the design meets all specifications and works as intended by developing and running simulation tests and debugging issues. They work closely with design engineers, write testbenches, and use verification methodologies such as UVM (Universal Verification Methodology). This role is critical in preventing costly design errors and ensuring high-quality semiconductor products.

How does an EDA Verification Engineer typically collaborate with design and software teams during the verification process?

As an EDA Verification Engineer, you'll work closely with both design and software teams to ensure that integrated circuits or electronic systems meet their specifications. Collaboration involves frequent communication to clarify design intent, align on test coverage goals, and resolve bugs. You'll participate in regular meetings, share verification plans, and provide feedback on design changes, often using shared project management tools and version control systems. This cross-functional teamwork is essential for identifying potential issues early and ensuring a high-quality final product.

What are the key skills and qualifications needed to thrive as an EDA Verification Engineer, and why are they important?

To thrive as an EDA Verification Engineer, you need a solid background in digital design, verification methodologies (like UVM or SystemVerilog), and a degree in electrical engineering or a related field. Familiarity with simulation tools (such as Cadence or Synopsys), scripting languages (Python, Perl), and version control systems is typically required. Strong analytical thinking, attention to detail, and effective teamwork are soft skills that set top performers apart. These skills ensure the accurate validation of complex integrated circuits, reducing design errors and enabling successful product launches.

What are popular job titles related to Eda Verification Engineer jobs?

For Eda Verification Engineer jobs, the most frequently searched job titles are:

Infographic showing various Eda Verification Engineer job openings in the United States as of June 2026, with employment types broken down into 1% As Needed, 97% Full Time, and 2% Part Time. Highlights an 91% Physical, 4% Hybrid, and 5% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Opening for Design Verification Engineer, Principal - CA

Santa Clara, CA • On-site

Aptuity Solutions, Inc
11 - 50 employees
Learn more about Aptuity Solutions, Incexternal

$158K/yr

Other

Re-posted 29 days ago

Job description

We have opening for Design Verification Engineer, Principal

Location - Santa Clara, CA

Full time permanent position

Sponsorship available

Must-haves
BS Computer Engineering, Electrical Engineering, or Computer Science
10+ years of verification and firmware and software development experience (or MS/PhD 5+ years experience).
Proven track records of leading Design Verification implementation activity
Tape-out of complex SOC under tight schedule.
In depth understanding and experience with System Verilog, UVM.
In depth experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
Experience with scripting language such as Python or Perl and EDA Verification tools.
Experience with Object-Oriented Design and implementation.
Good understanding of Linux O.S.
Good programming skills desired, especially C++ and ARM assembly.
Understanding of networking protocols, a plus.
Other Skills:
Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision.
Requires the ability to accept and work with differing opinions.
Cannot be a close-minded developer.
Must be able to learn on the fly and work in a fast-paced environment.
Required Skills
Proven track records of leading Design Verification implementation activity.
Tape-out of complex SOC under tight schedule.
In depth understanding and experience with System Verilog, UVM.
In depth experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
Experience with scripting language such as Python or Perl and EDA Verification tools.
Experience with Object-Oriented Design and implementation.
Good understanding of Linux O.S.
Good programming skills desired, especially C++ and ARM assembly.
Preferred or Nice-to-have Skills
Understanding of networking protocols, a plus.
Years of Experience: 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).
Industry Experience: Semi
Education Requirements: BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).

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