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Digital Asic Design Engineer Jobs (NOW HIRING)

Conductor

ASIC Design Engineer

Boston, MA · On-site

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

CrossBar, Inc.

ASIC Design Engineer

Santa Clara, CA · On-site

$156K - $165K/yr

ASIC Design Engineer Design, implement and debug the complex secure crypto engine SOC (System on Chips); write microarchitectural and/or design specifications; design, implement and debug complex ...

Nvidia

Senior ASIC Design Engineer

OR · On-site +1

... digital design concepts and experience in ASIC design flow including RTL design, verification ... programming (C/C++) and scripting (Perl/Python) # LI-Hybrid Your base salary will be determined ...

Phizenix

Digital Design Lead

Santa Clara, CA · On-site

$159K/yr

... engineers and coordinate with verification, DFT, and physical design teams to meet project schedules. Required Skills & Experience * Proven track record as an RTL Design Lead on complex digital ASIC ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

Fundamental digital design concepts and experience in ASIC design flow including RTL design ... Hands-on experience in programming (C/C++) and scripting (Perl/Python). # LI-Hybrid Your base ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

... digital design concepts and experience in ASIC design flow including RTL design, verification ... programming (C/C++) and scripting (Perl/Python) # LI-Hybrid Your base salary will be determined ...

Broadcom Inc.

Lead ASIC Design Engineer

San Jose, CA · On-site

$143K - $230K/yr

Lead ASIC Design EngineerSkip to main content#Lead ASIC Design Engineer page is loaded## Lead ASIC ... We are seeking a hands-on Principal Digital Design Engineer to serve as the **Chip Lead** for our ...

Atom Computing, Inc.

$140K - $175K/yr

Join a world-class team of scientists, engineers, and business professionals to advance the ... Atom Computing is seeking a Senior ASIC Designer to design and develop a digital signal processing ...

ServerLogic

Senior ASIC Design Engineer

Beaverton, OR · On-site

Sr/ ASIC Design Engineer (5+ Years of Experience) DESCRIPTION OF POSITION/DUTIES - * Architect a ... Understanding of digital design and verification practices. * Be able to take a specification ...

Atom Computing

Senior ASIC Design Engineer

Boulder, CO · On-site

$140K - $175K/yr

Join a world-class team of scientists, engineers, and business professionals to advance the ... Atom Computing is seeking a Senior ASIC Designer to design and develop a digital signal processing ...

Apple

ASIC Design and Integration Engineer

Beaverton, OR · On-site

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer ... Collaborate with hardware and software teams to integrate digital designs into complex SoCs. Timing ...

Atom Computing

Senior ASIC Design Engineer

Austin, TX · On-site

$140K - $175K/yr

Join a world-class team of scientists, engineers, and business professionals to advance the ... Atom Computing is seeking a Senior ASIC Designer to design and develop a digital signal processing ...

Apple

ASIC Design and Integration Engineer

Beaverton, OR · On-site

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer ... Collaborate with hardware and software teams to integrate digital designs into complex SoCs. Timing ...

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Digital Asic Design Engineer information

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$80.5K

$139.4K

$182.5K

How much do digital asic design engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for digital asic design engineer in the United States is $139,368.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is a digital ASIC design engineer?

Digital ASIC (Application-Specific Integrated Circuit) Design Engineers are professionals who design and develop custom integrated circuits tailored for specific digital applications. They are responsible for the entire design process, from initial specifications and architecture to logic design, verification, synthesis, and testing. These engineers use hardware description languages like VHDL or Verilog and work closely with other engineering teams to ensure the ASIC meets performance, power, and area requirements. Their work is crucial in industries such as telecommunications, consumer electronics, automotive, and computing, where specialized chips are needed.

What are some typical challenges digital ASIC design engineers face when working on complex chip projects?

Digital ASIC Design Engineers often encounter challenges such as meeting strict timing, power, and area constraints while ensuring the chip's functionality aligns with specifications. Managing the complexity of integrating multiple IP cores and collaborating with verification, physical design, and software teams can also be demanding. Additionally, adapting to evolving EDA tools and methodologies and troubleshooting unexpected design bugs during simulation or post-silicon validation are common aspects of the role. Effective communication and problem-solving skills are essential to overcome these challenges and deliver successful ASIC designs.

What are the key skills and qualifications needed to thrive as a digital ASIC design engineer, and why are they important?

To thrive as a Digital ASIC Design Engineer, you need a strong background in digital logic design, hardware description languages (such as Verilog or VHDL), and an engineering degree in electrical or computer engineering. Familiarity with EDA tools like Synopsys or Cadence, as well as experience with simulation and verification tools, is typically required. Analytical thinking, problem-solving abilities, and effective teamwork are crucial soft skills for this role. These competencies ensure the accurate design, verification, and implementation of complex digital systems, which are essential for successful chip development.

What is the difference between Digital Asic Design Engineer vs Digital FPGA Design Engineer?

AspectDigital Asic Design EngineerDigital FPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom chips for manufacturing; working in semiconductor labs or design housesDeveloping and testing FPGA prototypes; working in hardware labs or R&D teams
Industry UsageUsed in high-volume consumer electronics, automotive, and telecom productsCommon in prototyping, testing, and low-volume applications

Digital Asic Design Engineers focus on designing custom integrated circuits for mass production, while Digital FPGA Design Engineers develop programmable FPGA solutions for testing and rapid prototyping. Both roles require strong digital design skills and similar educational backgrounds, but differ in their application and work environment.

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Digital Asic Design Engineer jobs near you
Infographic showing various Digital Asic Design Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 87% Full Time, 9% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $139,368 per year, or $67 per hour.

ASIC Design Engineer

Boston, MA • On-site

Conductor
See more jobs at Conductorexternal

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Re-posted yesterday

Job description

We’re looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer.

Ideal Background:
  • Hands-on experience with multiple advanced node tapeouts
  • Ownership of ASIC design portion of at least one block in multiple advanced node tapeouts
  • Understanding of PPA improvement and what levers exist for each level of the stack
  • Ability to think creatively about methodology for fast design iterations
Nice to Have:
  • Hands-on experience with ASIC design process for large die (ideally reticle max) chips
  • Hands-on experience with ASIC design process for AI chips
  • Hands-on experience with multi-die/multi-chiplet/MCM designs
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