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Digital Asic Design Engineer Jobs in Toronto, ON

Responsibilities THE ROLE The IOHUB team at AMD is seeking a Principal ASIC Design Engineer to provide technical leadership for the development of next-generation IP that enables AMD products across ...

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

Responsibilities About the Department Central DFX (CDFX) is a centralized ASIC design group within ... THE PERSON: You have a passion for modern, complex processor architecture, digital design, and ...

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance ...

ASIC Design Engineer with hands-on experience across all aspects of IP RTL design, including architecture development, RTL implementation, verification support, and silicon bring-up. Proven expertise ...

This team is a group of highly experienced ASIC design engineers working on High speed (>2G) designs with very complex clocking infrastructures. The team owns implementation activities including ...

Proven experience with ASIC design tools: synthesis, linting, simulation, debugging, power aware simulation, etc. * Relevant design domain specific knowledge and technical leadership capability ...

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Digital Asic Design Engineer information

See Toronto, ON salary details

$38.2K

$141.1K

$200.9K

How much do digital asic design engineer jobs pay per year?

As of Aug 26, 2026, the average yearly pay for digital asic design engineer in Toronto, ON is $141,071.00, according to ZipRecruiter salary data. Most workers in this role earn between $118,815.00 and $170,349.00 per year, depending on experience, location, and employer.

What is a digital ASIC design engineer?

Digital ASIC (Application-Specific Integrated Circuit) Design Engineers are professionals who design and develop custom integrated circuits tailored for specific digital applications. They are responsible for the entire design process, from initial specifications and architecture to logic design, verification, synthesis, and testing. These engineers use hardware description languages like VHDL or Verilog and work closely with other engineering teams to ensure the ASIC meets performance, power, and area requirements. Their work is crucial in industries such as telecommunications, consumer electronics, automotive, and computing, where specialized chips are needed.

What are some typical challenges digital ASIC design engineers face when working on complex chip projects?

Digital ASIC Design Engineers often encounter challenges such as meeting strict timing, power, and area constraints while ensuring the chip's functionality aligns with specifications. Managing the complexity of integrating multiple IP cores and collaborating with verification, physical design, and software teams can also be demanding. Additionally, adapting to evolving EDA tools and methodologies and troubleshooting unexpected design bugs during simulation or post-silicon validation are common aspects of the role. Effective communication and problem-solving skills are essential to overcome these challenges and deliver successful ASIC designs.

What are the key skills and qualifications needed to thrive as a digital ASIC design engineer, and why are they important?

To thrive as a Digital ASIC Design Engineer, you need a strong background in digital logic design, hardware description languages (such as Verilog or VHDL), and an engineering degree in electrical or computer engineering. Familiarity with EDA tools like Synopsys or Cadence, as well as experience with simulation and verification tools, is typically required. Analytical thinking, problem-solving abilities, and effective teamwork are crucial soft skills for this role. These competencies ensure the accurate design, verification, and implementation of complex digital systems, which are essential for successful chip development.

What is the difference between Digital Asic Design Engineer vs Digital FPGA Design Engineer?

AspectDigital Asic Design EngineerDigital FPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom chips for manufacturing; working in semiconductor labs or design housesDeveloping and testing FPGA prototypes; working in hardware labs or R&D teams
Industry UsageUsed in high-volume consumer electronics, automotive, and telecom productsCommon in prototyping, testing, and low-volume applications

Digital Asic Design Engineers focus on designing custom integrated circuits for mass production, while Digital FPGA Design Engineers develop programmable FPGA solutions for testing and rapid prototyping. Both roles require strong digital design skills and similar educational backgrounds, but differ in their application and work environment.

What are popular job titles related to Digital Asic Design Engineer jobs in Toronto, ON?

For Digital Asic Design Engineer jobs in Toronto, ON, the most frequently searched job titles are:

What job categories do people searching Digital Asic Design Engineer jobs in Toronto, ON look for?

The top searched job categories for Digital Asic Design Engineer jobs in Toronto, ON are:

Infographic showing various Digital Asic Design Engineer job openings in Toronto, ON as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $141,071 per year, or $67.8 per hour.

Principal ASIC Design Engineer

Advanced Micro Devices, Inc

Thornhill, ON • On-site, Remote

Full-time

Posted 11 days ago


Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

28th of 159 rated electronics manufacturers


Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

THE ROLE

The IOHUB team at AMD is seeking a Principal ASIC Design Engineer to provide technical leadership for the development of next-generation IP that enables AMD products across server, data center, client, and embedded markets. As a senior member of the team, you will help define and deliver innovative technologies that manage and optimize AI-driven data movement, enabling industry-leading performance, scalability, security, virtualization, and power efficiency.

In this role, you will collaborate with architecture, design, verification, firmware, implementation, and product teams across AMD to transform complex product requirements into robust silicon solutions. You will have the opportunity to influence technical strategy, drive architectural innovation, mentor engineers, and help shape engineering best practices that support AMD's future generations of AI and high-performance computing products.

THE PERSON

You are a collaborative and technically influential engineering leader who thrives in solving complex design challenges and driving execution across multidisciplinary teams. You combine strong architectural judgment with a practical, results-oriented approach to problem solving and are comfortable making decisions in ambiguous environments.

You are passionate about mentoring engineers, elevating technical quality, and promoting scalable design methodologies. You communicate effectively across organizations, build alignment among stakeholders, and demonstrate ownership in driving challenging technical issues to closure. You also embrace emerging technologies, including AI-enabled engineering tools, to enhance productivity, design quality, and development efficiency.

KEY RESPONSIBILITIES

  • Provide technical leadership and ownership for critical IOHUB IP development, ensuring successful execution from architecture through tape-out and post-silicon validation.
  • Partner with architecture teams to evaluate technical trade-offs, define requirements, and translate product objectives into scalable and high-quality design solutions.
  • Drive design quality and implementation readiness by ensuring designs meet functional, timing, area, power, security, and reliability goals.
  • Lead cross-functional collaboration among architecture, design, verification, firmware, physical design, and product teams to achieve program milestones and successful product delivery.
  • Identify technical risks, dependencies, and integration challenges early, and develop effective mitigation and execution strategies.
  • Establish and promote engineering best practices that improve design quality, reuse, efficiency, maintainability, and long-term scalability.
  • Mentor and guide engineers through architecture reviews, implementation challenges, debug activities, and technical decision-making processes.
  • Drive successful post-silicon bring-up, validation, and root-cause analysis activities to support product quality and continuous improvement.
  • Communicate technical direction, project status, risks, and key decisions effectively to engineering leadership and stakeholders across global teams.
  • Champion the adoption of innovative methodologies, including AI-assisted workflows and automation, to enhance engineering effectiveness and development velocity.

 

PREFERRED EXPERIENCE

  • Proven track record of leading significant ASIC or silicon design contributions through multiple successful product tape-outs.
  • Deep expertise in RTL design, microarchitecture development, and complex IP design within advanced SoC environments.
  • Experience developing high-performance designs that address power, performance, security, scalability, and virtualization requirements.
  • Strong understanding of industry-standard simulation, lint, CDC, RDC, formal verification, static analysis, synthesis, and timing closure methodologies.
  • Experience collaborating across architecture, design verification, implementation, firmware, and post-silicon engineering organizations.
  • Proficiency with Verilog, SystemVerilog, and scripting languages such as Python, Perl, or Tcl for design automation and productivity improvements.
  • Experience leveraging AI-enabled tools to improve design workflows, automation, analysis, debug, documentation, or engineering productivity.
  • Demonstrated ability to lead technical reviews, influence design decisions, and drive complex technical issues to resolution.
  • Strong written and verbal communication skills with the ability to present technical information to engineering and leadership audiences.
  • Demonstrated technical leadership, ownership, accountability, and commitment to engineering excellence.

ACADEMIC CREDENTIALS

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field preferred.
  • Master's degree or Ph.D. in a related technical discipline desired.

LOCATION:

 Markham, Ontario, Canada

#LI-MO2

#HYBRID

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

Qualifications:

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

Education:UNAVAILABLEEmployment Type: FULL_TIME

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