You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design ...
You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design ...
DDR Design Engineer
Beaverton, OR · On-site
You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design ...
DDR Design Engineer
Beaverton, OR · On-site
You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design ...
DDR Design Engineer
Beaverton, OR · On-site
You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design ...
DDR Design Engineer
Beaverton, OR · On-site
You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design ...
Our team works collaboratively between the color design, material design, footwear design and 3D design functions. We are dedicated to cultivating a culture of continuous learning and growth, where ...
Our team works collaboratively between the color design, material design, footwear design and 3D design functions. We are dedicated to cultivating a culture of continuous learning and growth, where ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Timing Design Engineer
Beaverton, OR · On-site
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You ...
Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools. Deep ...
Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools. Deep ...
Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools. Deep ...
Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools. Deep ...
SoC Physical Design Verification Engineer
Beaverton, OR · On-site
$141K - $145K/yr
In this highly visible role, you will be a part of a critical team responsible for physical verification of an SOC. Description • As a member of our physical design team, you will perform various ...
SoC Physical Design Verification Engineer
Beaverton, OR · On-site
$141K - $145K/yr
In this highly visible role, you will be a part of a critical team responsible for physical verification of an SOC. Description • As a member of our physical design team, you will perform various ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation ...
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
Description - Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. - Complete netlist to GDS2 implementation for partition(s ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
Description - Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. - Complete netlist to GDS2 implementation for partition(s ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
Description - Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. - Complete netlist to GDS2 implementation for partition(s ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
Description - Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. - Complete netlist to GDS2 implementation for partition(s ...
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
CPU Design Methodology Engineer
OR · On-site +1
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
CPU Design Methodology Engineer
OR · On-site +1
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies ...
Color Design Manager - Footwear | Contract until July 2027
Portland, OR · On-site
$200K/yr
Our team works collaboratively between the color design, material design, footwear design and 3D design functions. We are dedicated to cultivating a culture of continuous learning and growth, where ...
Color Design Manager - Footwear | Contract until July 2027
Portland, OR · On-site
$200K/yr
Our team works collaboratively between the color design, material design, footwear design and 3D design functions. We are dedicated to cultivating a culture of continuous learning and growth, where ...
Design Team information
See Oregon salary details
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9% of jobs
$115.8K is the 25th percentile. Wages below this are outliers.
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The median wage is $123.7K / yr.
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7% of jobs
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$125.6K
$145.4K
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What is the difference between Design Team vs Graphic Designer?
| Aspect | Design Team | Graphic Designer |
|---|---|---|
| Credentials | Varies; often includes multiple specialists or departments | Typically requires a degree or certification in graphic design or related field |
| Work Environment | Collaborative, multi-disciplinary teams within agencies or companies | Individual or small team work, often in design studios or freelance settings |
| Industry Usage | Used across advertising, marketing, product development, and digital media | Primarily in branding, advertising, publishing, and digital media |
The Design Team encompasses a group of professionals working together on various design projects, including graphic design, UX/UI, and more. In contrast, a Graphic Designer focuses specifically on creating visual content. While graphic designers are often part of a design team, the team itself includes multiple roles working collaboratively to achieve broader project goals.
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DDR Design Engineer
Beaverton, OR
Full-time
Re-posted 10 days ago
Apple rating
8.1
Based on 684 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.
Description
In this role, you will be responsible for performing concept studies and providing direction in terms of performance, gate count and power for various digital designs. You will be responsible for writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers. You will provide high-quality RTL description, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. You will also support design verification to insure bug-free first silicon. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.
Preferred Qualifications
RTL design using Verilog or SystemVerilog, assertion writing.
Design of state machines, data paths, arbitration and clock domain crossing logic.
Logic synthesis, timing constraints.
Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL.
Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.
Prior experience in DDR PHY design and mixed-signal environment is a plus.
Minimum Qualifications
BS degree in technical discipline with minimum 10 years of relevant experience.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976