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Ddr Verification Engineer Jobs (NOW HIRING)

Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR is a plus but not required Knowledge of formal verification methodology is a plus but not ...

WI · On-site

$124K - $152K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR is a plus but not requiredKnowledge of formal verification methodology is a plus but not ...

Design Verification Engineer

Cary, NC · On-site

$126K - $153K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR is a plus but not required Knowledge of formal verification methodology is a plus but not ...

Design Verification Engineer

San Jose, CA · On-site

$143K - $230K/yr

Develop verification environments using modern verification techniques such as SystemVerilog and ... Knowledge of CPU, DDR, bus protocols, network protocols or DSP design. Compensation & Benefits The ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR Basic knowledge of formal verification methodology Some experience with power-aware (UPF) or ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR is a plus but not required Knowledge of formal verification methodology is a plus but not ...

GSoC Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

As part of the Global SoC organization, our ASIC Design Verification Engineers bring deep expertise ... CPU verificationCache coherency protocols (ACE, CHI, CXL)DDR or HBM memory systemsPCIe, Ethernet ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR is a plus but not required Knowledge of formal verification methodology is a plus but not ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR is a plus but not required Knowledge of formal verification methodology is a plus but not ...

GSoC Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

As part of the Global SoC organization, our ASIC Design Verification Engineers bring deep expertise ... DDR or HBM memory systems * PCIe, Ethernet, or networking protocols * AI/ML accelerator design ...

... DDR Design Engineer. As a member of our dynamic group, you will have the rare and rewarding ... You will also support design verification to insure bug-free first silicon. Responsibilities will ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

This role is for a DV engineer who will enable us to produce fully functional first silicon for IP ... DDR is a plus but not required Knowledge of formal verification methodology is a plus but not ...

... DDR Design Engineer. As a member of our dynamic group, you will have the rare and rewarding ... You will also support design verification to insure bug-free first silicon. Responsibilities will ...

Showing results 41-60

Ddr Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do ddr verification engineer jobs pay per year?

As of Sep 12, 2026, the average yearly pay for ddr verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What are popular job titles related to Ddr Verification Engineer jobs?

For Ddr Verification Engineer jobs, the most frequently searched job titles are:

Design Verification Engineer

San Francisco, CA • On-site

Apple
Computer and Electronic Product Manufacturing • 10K+ employees

$160K - $195K/yr

Full-time

Re-posted 28 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 684 frontline employees who took The Breakroom Quiz


Job description

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple's customers daily.
This role is for a DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.
Description
In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture. You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment. You will get to develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. A mindset to break the design is highly desirable.
Furthermore, you will develop verification plans for all features under your care, execute verification plans, including design bring-up, DV environment bring- up, regression enabling features, and debug of the test failures. You will also learn to develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage. You will also be expected to make use of LLM and related technologies to achieve efficient execution and improved quality.
Minimum Qualifications
BS degree in technical subject area and a minimum 10 years relevant industry experience.
Preferred Qualifications
Deep knowledge of OOP, SystemVerilog and UVM
Deep knowledge in developing scalable and portable test-benches
Strong experience with verification methodologies and tools such as simulators, waveform viewers, Build and run automation, coverage collection, gate level simulations
Working experience using LLMs for efficiency and quality
Experience with power-aware (UPF) or similar verification methodology
Excellent knowledge of one of the scripting languages such as Python, Perl, TCL
Experience with serial protocols such as PCIe or USB, parallel protocol such as DDR is a plus but not required
Knowledge of formal verification methodology is a plus but not required
Knowledge of emulation for verification technologies is a plus but not required

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976