Ddr Verification Engineer Jobs (NOW HIRING)

AI2487 As the DDR Design Verification Engineer, you will participate in definition and develop the verification methodology for SiMa.ai's MLSoC™. You will be responsible for developing DDR test ...

AI2487 As the DDR Design Verification Engineer, you will participate in definition and develop the verification methodology for SiMa.ai's MLSoC™. You will be responsible for developing DDR test ...

AI2487 As the DDR Design Verification Engineer, you will participate in definition and develop the verification methodology for SiMa.ai's MLSoC™. You will be responsible for developing DDR test ...

General Information Job Title Senior Staff Verification Engineer (DDR/LPDDR)-18604 Job ID 18604 City Sunnyvale State/Province California Date Posted 01-Sep-2026 Job Category Engineering Job ...

Santa Clara, CA Duration 6 Month Contract Verification engineers - OVM/UVM is Mandatory CPU subsystem/DDR/Modem verification Additional Information All your information will be kept confidential ...

San Jose, CA Looking for engineers with strong protocol expertise to verify industry-standard interface IPs such as PCIe, DDR, Ethernet, USB, etc. Key Responsibilities: * Verify interface IPs for ...

Staff Verification Engineer Office Located in Campbell, CA ( 100 % remote considered) Duration ... DDR is mandatory. Expertise in formal verification flows and techniques. Strong communication and ...

... engineering with 8+ years of hands-on ASIC verification experience * Deep proficiency in UVM methodology and System Verilog, you have built test benches that found bugs * Strong understanding of DDR ...

Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job ... Verification of high-speed bus protocols such as AXI, AHB, APB, PCIe, USB, Ethernet, DDR, MIPI, or ...

Senior Verification Engineer Location: Campbell, CA ( 100 % remote considered) Duration: Full Time ... Prior experience with Protocol verification such as Ethernet, PCIe, Risk 5, DDR, System ...

You will work closely with architects, design engineers, software teams, and verification ... DDR/HBM memory subsystems * PCIe, CXL, Ethernet, and high-speed interfaces * Security, RAS, and ...

... Design Verification Engineer to join its memory subsystem verification team. The successful ... Experience verifying LPDDR, DDR, DDR PHY, HBM, custom memory interfaces. * Familiarity with JEDEC ...

Experience verifying LPDDR, DDR, DDR PHY, HBM, custom memory interfaces. * Familiarity with JEDEC ... OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification ...

Your job responsibilities as a Design Verification Engineer will help the team to verify the ... SoC and IP verification experience on either one aspect (PCIe, Ethernet, HBM, GDDR, DDR, MMU, Cache)

Preferred QualificationsExperience verifying LPDDR, DDR, DDR PHY, HBM, custom memory interfaces ... ORPhD in Science, Engineering, or related field and 2+ years of ASIC design, verification ...

... engineering with 8+ years of hands-on ASIC verification experience * Deep proficiency in UVM methodology and System Verilog, you have built test benches that found bugs * Strong understanding of DDR ...

Your job responsibilities as a Design Verification Engineer will help the team to verify the ... SoC and IP verification experience on either one aspect (PCIe, Ethernet, HBM, GDDR, DDR, MMU, Cache)

General Information Job Title Interface IP Verification Engineer (Pre-Silicon) - 18381 Job ID 18381 ... In this role, you'll work on industry-leading PCIe, CXL, DDR, and Ethernet technologies that serve ...

Rootcause complex failures across RTL, testbench, interfaces (PCIe/DDR/Ethernet), and system ... Mentor junior engineers and provide technical leadership within the verification team. LANGUAGES ...

In this role, you'll work on industry-leading PCIe, CXL, DDR, and Ethernet technologies that serve ... You'll collaborate with architects, design engineers, and verification experts to ensure the ...