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Cpu Rtl Design Engineer Jobs in New York (NOW HIRING)

Analog Devices

Digital Design Engineer

Somerset, NJ · On-site

$143K/yr

Own the architecture, micro-architecture, and RTL design of complex digital blocks and/or ... Mentor and guide junior engineers, sharing expertise and promoting best practices. * Author and ...

Analogdevices

Digital Design Engineer

Somerset, NJ

$143K/yr

Own the architecture, micro-architecture, and RTL design of complex digital blocks and/or ... Mentor and guide junior engineers, sharing expertise and promoting best practices. * Author and ...

QCi

FPGA Design Engineer

Hoboken, NJ · On-site

$134K - $185K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

Quantum Computing Inc.

FPGA Design Engineer

Hoboken, NJ · On-site

$134K - $185K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

Cloud Peritus

Hardware Engineer

New York, NY · On-site

$135K - $178K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: • Architect and implement FPGA applications (RTL design, synthesis, place ...

Jane Street

ASIC Physical Design Engineer

New York, NY · On-site

$148K - $153K/yr

You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ... using software engineering techniques to improve the hardware design process, and you have ...

Cloud Peritus

Hardware Engineer

New York, NY · On-site

$135K - $178K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)

Jane Street

ASIC Physical Design Engineer

New York, NY

$148K - $153K/yr

You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ... using software engineering techniques to improve the hardware design process, and you have ...

Jane Street

ASIC Engineer

New York, NY · On-site

$181K/yr

Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...

Jane Street

ASIC Engineer

New York, NY · On-site

$181K/yr

Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...

Airspan

FPGA DESIGN ENGINEER

Warren, NJ · On-site

$127K - $176K/yr

Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...

Citadel Securities

FPGA Engineer (Intern)

Manhattan, NY

$4K - $4K/wk

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...

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Cpu Rtl Design Engineer information

See New York salary details

$44.3K

$96.4K

$173.4K

How much do cpu rtl design engineer jobs pay per year?

As of Jun 10, 2026, the average yearly pay for cpu rtl design engineer in New York is $96,439.00, according to ZipRecruiter salary data. Most workers in this role earn between $74,400.00 and $107,800.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
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Cpu Rtl Design Engineer jobs near you

Design Verification Engineer - Fully Remote | Upto $175/hr

Mercor

New York, NY • Remote

$175/hr

Full-time

Posted 14 days ago

Job description

About the job

Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam D'Angelo, Larry Summers, and Jack Dorsey.

Position: RTL Design Engineers
Type: Contract
Compensation: $100–$175/hour
Location: Remote
Duration: 3+ months
Commitment: 40 hours/week

Role Responsibilities

  • Evaluate digital chip design workflows to enhance AI model training and evaluation.
  • Design and verify RTL components using Verilog/SystemVerilog.
  • Collaborate with architecture, verification, and implementation teams to improve model outputs.
  • Develop reusable verification components and testbench infrastructure.
  • Leverage LLM-based tools to accelerate chip design and verification processes.
  • Work independently and asynchronously to meet project deadlines.

Qualifications

Must-Have

  • 3–10 years of experience in digital RTL design or design verification.
  • Strong proficiency in Verilog/SystemVerilog and UVM.
  • Solid understanding of digital design fundamentals: FSMs, datapaths, pipelines, FIFOs, arbiters, clock/reset domains, bus protocols.
  • Experience with ASIC design flows and common EDA tools.
  • Ability to write clear design documentation and communicate technical tradeoffs.

Preferred

  • Knowledge of AMBA protocols (AXI, AHB, APB).
  • Background in CPU, GPU/ML accelerator, networking, memory subsystem, PCIe/high-speed IO, SoC interconnect, low-power design.
  • Exposure to formal verification or SV/UVM-based design verification.

Start Date

  • Week of 04/23; applications reviewed on a rolling basis.

Compensation & Legal

  • Hourly contractor, Paid weekly.

Application Process (Takes 20–30 mins to complete)

  • Upload resume
  • AI interview based on your resume
  • Submit form

Resources & Support

  • For details about the interview process and platform information, please check: https://talent.docs.mercor.com/welcome
  • For any help or support, reach out to: support@mercor.com

PS: Our team reviews applications daily. Please complete your AI interview and application steps to be considered for this opportunity.