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Cpu Rtl Design Engineer Jobs in New York (NOW HIRING)

Normal Computing

RTL Design Engineer

New York, NY · On-site

$205K - $285K/yr

The Role As an RTL Design Engineer at Normal, you will design and verify the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design ...

QCi

FPGA Design Engineer

Hoboken, NJ · On-site

$134K - $185K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

Quantum Computing Inc.

FPGA Design Engineer

Hoboken, NJ · On-site

$134K - $185K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

Jane Street

ASIC Physical Design Engineer

New York, NY · On-site

$148K - $153K/yr

You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ... using software engineering techniques to improve the hardware design process, and you have ...

Cloud Peritus

Hardware Engineer

New York, NY · On-site

$135K - $178K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: • Architect and implement FPGA applications (RTL design, synthesis, place ...

Cloud Peritus

Hardware Engineer

New York, NY · On-site

$135K - $178K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)

Jane Street

ASIC Physical Design Engineer

New York, NY

$148K - $153K/yr

You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ... using software engineering techniques to improve the hardware design process, and you have ...

Normal Computing

FPGA Design Engineer

New York, NY · On-site

$200K - $280K/yr

As our FPGA Design Engineer, you will own the bridge between RTL and physical silicon: bringing our physics-inspired ASIC designs to life on FPGA platforms for pre-silicon validation and early ...

Jane Street

ASIC Engineer

New York, NY · On-site

$181K/yr

Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...

Jane Street

ASIC Engineer

New York, NY · On-site

$181K/yr

Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...

Airspan

FPGA DESIGN ENGINEER

Warren, NJ · On-site

$127K - $176K/yr

Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...

Citadel Securities

FPGA Engineer (Intern)

Manhattan, NY · On-site

$4.3K - $4.8K/wk

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...

Jane Street

FPGA Engineer

New York, NY · On-site

$142K - $182K/yr

Your day-to-day work will predominantly involve OCaml & Hardcaml, for both RTL design and testing ... A top-notch programmer with a love for technology * Comfortable with a software programming ...

Jane Street

Hardware Engineer (FPGA/ASIC)

New York, NY · On-site

... both RTL design and testing/integration. If you'd like to learn more, you can read about our ... Comfortable with a software programming language * Experienced with a Hardware Description (or ...

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Cpu Rtl Design Engineer information

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$44.3K

$96.4K

$173.4K

How much do cpu rtl design engineer jobs pay per year?

As of Jul 12, 2026, the average yearly pay for cpu rtl design engineer in New York is $96,439.00, according to ZipRecruiter salary data. Most workers in this role earn between $74,400.00 and $107,800.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
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Cpu Rtl Design Engineer jobs near you

RTL Design Engineer

Normal Computing

New York, NY • On-site

$205K - $285K/yr

Full-time

Posted 8 days ago

Job description

About Normal Computing
Normal Computing builds silicon that turns thermal noise from an obstacle into a computational resource. Conventional chips spend most of their energy forcing determinism onto physics; ours compute with it. Stochastic, in-memory, asynchronous: the result is 10-100× more AI inference per dollar, per watt.
We co-design the full stack: AI-native EDA systems in production with the world's largest semiconductor companies, and the advanced ASICs they make possible. Backed by $85M+ from the world's leading deep-tech investors and built by scientists, engineers, and operators from the labs that built modern computing.
Normal works as one team across New York, Silicon Valley, London, Copenhagen, and Seoul. We hire people who want the hardest version of their craft, across every discipline, at every seniority.
The Role
As an RTL Design Engineer at Normal, you will design and verify the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence.
You will own RTL from microarchitecture to tapeout: writing synthesizable SystemVerilog, authoring verification environments in UVM, cocotb, or formal tools, and working closely with architecture and physical design to make sure what you build is both functionally correct and physically realizable. Because Normal's chips are not standard accelerators, the RTL engineer here is closer to first-principles decisions than at a larger company. You will be shaping architecture, not just implementing it.
This is a role for an engineer who does not draw a hard line between design and verification. The strongest candidates have taped out silicon, written both RTL and testbenches, and are comfortable working in an environment where the specification is still being developed in parallel.
What You'll Own
  • RTL Design: Write and own synthesizable RTL in SystemVerilog across blocks ranging from datapath logic to control and memory interfaces.
  • Verification: Author functional verification environments using UVM, cocotb, formal property checking, or a combination.
  • Microarchitecture: Work with architecture to translate high-level specifications into implementable microarchitectures.
  • Physical Design Collaboration: Collaborate with physical design on timing closure, floorplanning constraints, and DFT.
  • Simulation Infrastructure: Develop and maintain simulation infrastructure, regression pipelines, and coverage closure flows.
  • Design Reviews: Participate in design reviews and contribute to architecture decisions, not just implementation.
  • Tapeout & Bring-up: Support tapeout preparation, integration, and post-silicon bring-up as needed.

What Makes You a Great Fit
  • Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route
  • Experience authoring verification environments in UVM, cocotb, formal, or equivalent, not just running existing testbenches
  • At least one tapeout in your background, from any node and any company size
  • Comfort operating across both design and verification without treating them as separate disciplines
  • Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront
  • Strong debugging instincts across simulation, waveforms, and formal counterexamples
  • Ability to work directly with architects and physical designers without needing a large intermediary layer
  • Industry experience in ASIC or SoC design

Bonus Points
  • Experience at an AI chip company where design and verification were tightly coupled
  • Open-source RTL contributions to projects like Chipyard, OpenTitan, or CVA6
  • Familiarity with RISC-V or other open ISAs
  • Experience with AI-assisted RTL or EDA tooling in your design workflow
  • Exposure to physical design constraints, floorplanning, or timing-driven RTL development

Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.

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