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Contractual Asic Rtl Design Engineer Jobs in Mountain View, CA

Hands-on experience with industry ASIC design flow including RTL coding, debugging/verification ... We deliver agile, scalable talent solutions across IT, engineering, life sciences, clinical, and ...

Hands-on experience in industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure. * Working knowledge of Client cores and other I/O standard ...

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...

ASIC RTL/SoC Design Engineer

San Jose, CA · On-site

$110K - $300K/yr

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...

Set the technical bar in design reviews and mentor design engineers Required qualifications * BS or MS in EE, CE, or CS with 7+ years (or equivalent) of industry experience in ASIC RTL design

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Contractual Asic Rtl Design Engineer information

See Mountain View, CA salary details

$110.9K

$177.2K

$238.3K

How much do contractual asic rtl design engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for contractual asic rtl design engineer in Mountain View, CA is $177,183.00, according to ZipRecruiter salary data. Most workers in this role earn between $155,100.00 and $212,300.00 per year, depending on experience, location, and employer.

What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?

AspectContractual Asic Rtl Design EngineerDigital IC Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentContract-based, project-specific, often in semiconductor or tech companiesFull-time or contract, working on digital integrated circuit design
Industry UsageCommon in semiconductor, electronics, and tech firms for ASIC developmentUsed across semiconductor, consumer electronics, and communication industries

Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Mountain View, CA?

The most popular types of Asic Rtl Design Engineer jobs in Mountain View, CA are:

What job categories do people searching Contractual Asic Rtl Design Engineer jobs in Mountain View, CA look for?

The top searched job categories for Contractual Asic Rtl Design Engineer jobs in Mountain View, CA are:

What cities near Mountain View, CA are hiring for Contractual Asic Rtl Design Engineer jobs?

Cities near Mountain View, CA with the most Contractual Asic Rtl Design Engineer job openings:

ASIC/RTL Design Engineer

Saicon Consultants Inc.

San Jose, CA • On-site

Other

Posted 5 days ago


Job description

 
  • The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and *** internal IPs.
  • Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC?s in advanced digital CMOS processes.Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.

EXPERIENCE AND EDUCATION:
  • SoC Architecture; knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure.
  • Working knowledge of ARM cores and other I/O standard interfaces. An ideal candidate would also exhibit
  • Strong communication and documentation skills, Good organizational, time management and multitasking skills, Strong initiative and discipline to follow-through, Technical leadership. 10+ years of experience.