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Contractual Asic Rtl Design Engineer Jobs in Leander, TX

Mythic

Senior RTL Design Engineer

Austin, TX

$120K - $225K/yr

We're hiring experienced RTL Design Engineers to play a key role in designing and implementing the components that will bring our next-generation AI processors to life. About Us: Mythic is building ...

Meta

ASIC Engineer, Design

Austin, TX

$146K/yr

ASIC Engineer, Design Responsibilities ... Develop micro-architecture, RTL coding, and design verification for complex IPs. * Work with ...

Ericsson

ASIC Developer

Austin, TX · On-site

$117K - $175K/yr

Grow with us Senior RTL Design Engineer - Accelerator IP Location: Austin, TX (Hybrid; on-site ... End-to-end ASIC flow mastery: coding, linting, CDC, synthesis, timing closure. Proven ability to ...

Apple

RTL Design Engineer

Austin, TX · On-site

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

Apple

RTL Design Engineer

Austin, TX · On-site

If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class ...

Ericsson GmbH

ASIC Developer

Austin, TX · On-site

$117 - $175/hr

Senior RTL Design Engineer - Accelerator IP Location: Austin, TX (Hybrid; on‑site) Your Next Big ... End‑to‑end ASIC flow mastery: coding, linting, CDC, synthesis, timing closure. * Proven ability ...

ARM

Staff RTL Design Engineer

Austin, TX · Hybrid

$198K - $268K/yr

As an Interconnect RTL Design Engineer, you will be part of the Systems team focused on next-generation interconnects targeting high-end mobile, automotive, networking, and enterprise markets! You ...

ARM

Staff RTL Design Engineer

Austin, TX · On-site

$198K - $268K/yr

As an Interconnect RTL Design Engineer, you will be part of the Systems team focused on next-generation interconnects targeting high-end mobile, automotive, networking, and enterprise markets! You ...

Atom Computing

Senior ASIC Design Engineer

Austin, TX · On-site

$140K - $175K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration. * Work closely with Atom Computing's quantum physicists, optical engineers, hardware and software ...

Atom Computing

Senior ASIC Design Engineer

Austin, TX

$140K - $175K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration. * Work closely with Atom Computing's quantum physicists, optical engineers, hardware and software ...

Atom Computing

Senior ASIC Design Engineer

Austin, TX

$140K - $175K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration. * Work closely with Atom Computing's quantum physicists, optical engineers, hardware and software ...

Nvidia

ASIC Design Engineer - Hardware

Austin, TX · Hybrid

Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You ... Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset ...

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All JobsContractual Asic Rtl Design Engineer JobsContractual Asic Rtl Design Engineer Jobs in Leander, TX

Contractual Asic Rtl Design Engineer information

See Leander, TX salary details

$89.8K

$143.5K

$193K

How much do contractual asic rtl design engineer jobs pay per year?

As of Aug 23, 2026, the average yearly pay for contractual asic rtl design engineer in Leander, TX is $143,513.00, according to ZipRecruiter salary data. Most workers in this role earn between $125,600.00 and $172,000.00 per year, depending on experience, location, and employer.

What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?

AspectContractual Asic Rtl Design EngineerDigital IC Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentContract-based, project-specific, often in semiconductor or tech companiesFull-time or contract, working on digital integrated circuit design
Industry UsageCommon in semiconductor, electronics, and tech firms for ASIC developmentUsed across semiconductor, consumer electronics, and communication industries

Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Leander, TX?

The most popular types of Asic Rtl Design Engineer jobs in Leander, TX are:

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Contractual Asic Rtl Design Engineer jobs near you

Senior RTL Design Engineer

Mythic

Austin, TX

$120K - $225K/yr

Full-time

Re-posted 19 days ago

Job description

We're hiring experienced RTL Design Engineers to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.
 
About Us:
Mythic is building the future of AI computing with breakthrough analog technology that delivers 100 the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from -40 C to +125 C, making it ideal for industrial, automotive, aerospace, and defense.
 
We've raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.
 
The salary range for this position is $120,000-$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.
 
RTL Design at Mythic:
At Mythic, our RTL design team is at the heart of transforming our custom digital dataflow architecture into working silicon. This architecture incorporates a novel scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines. Together with our Analog Compute Engines, these critical technologies enable unprecedented efficiency for modern AI workloads. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that drives our breakthrough AI hardware.
 
The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon groups to ensure every component integrates seamlessly into the full system. Because today's AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply both creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.
Responsibilities
  • Design and implement RTL for Mythic's next-generation AI processor.
  • Contribute to the development of a novel digital dataflow architecture, including a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines.
  • Develop and optimize high-performance, low-power components such as datapaths, controllers, memory subsystems, and interconnects.
  • Collaborate with architects and verification engineers to define microarchitecture and ensure functional correctness.
  • Drive timing closure by working closely with synthesis and physical design teams.
  • Participate in design reviews and contribute to improving RTL coding practices and methodologies.
Requirements
  • Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 8+ years of industry experience in RTL design, microarchitecture, and architecture development.
  • Solid understanding of computer architecture fundamentals (pipelines, caches, coherence, memory hierarchies).
  • Hands-on experience with one or more of the following subsystems: scheduling fabrics, high-performance interconnects, DMA engines, memory controllers, or datapath/control logic.
  • Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines.
  • Familiarity with timing constraints, physical design considerations, and EDA flows.
  • Hands-on experience with simulation, synthesis, linting, and static timing analysis tools.
  • Strong problem-solving and communication skills with ability to work in cross-functional teams.
Preferred Qualifications
  • Familiarity with network-on-chip (NoC) architectures.
  • Expertise in low-power design techniques (clock gating, power gating, multi-voltage domains).
  • Experience with timing closure in advanced technology nodes and collaboration with physical design teams.
  • Strong skills in performance modeling and trade-off analysis (PPA optimization).
  • Hands-on experience with emulation/FPGA prototyping for early RTL validation.
  • Familiarity with AI, DSP, or other parallel compute architectures.
  • Strong scripting ability (Python or similar) for design automation and productivity.
At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.
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