VLSI Verification Engineer Location ... Santa Clara, CA Duration 6 Month Contract Verification engineers - OVM/UVM is Mandatory CPU ...
VLSI Verification Engineer Location ... Santa Clara, CA Duration 6 Month Contract Verification engineers - OVM/UVM is Mandatory CPU ...
ASIC Verification Engineer
Austin, TX · On-site
In depth knowledge in VLSI verification flow, languages and concepts. * Experience in data path or ... Debug the functionality with design engineers. * Perform coverage collection and follow the ...
ASIC Verification Engineer
Austin, TX · On-site
In depth knowledge in VLSI verification flow, languages and concepts. * Experience in data path or ... Debug the functionality with design engineers. * Perform coverage collection and follow the ...
ASIC Senior Verification Engineer
Austin, TX · On-site
In depth knowledge in VLSI verification flow, languages and concepts. * Experience in data path or ... Debug the functionality with design engineers. * Perform coverage collection and follow the ...
ASIC Senior Verification Engineer
Austin, TX · On-site
In depth knowledge in VLSI verification flow, languages and concepts. * Experience in data path or ... Debug the functionality with design engineers. * Perform coverage collection and follow the ...
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Lead, mentor, and manage a team of verification engineers to meet project milestones and ... In-depth knowledge of VLSI verification flows , concepts, methodologies and interfaces with ...
Lead, mentor, and manage a team of verification engineers to meet project milestones and ... In-depth knowledge of VLSI verification flows , concepts, methodologies and interfaces with ...
ASIC verification engineer
Roseville, CA · On-site
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC verification engineer
Roseville, CA · On-site
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC verification engineer
Roseville, CA · On-site
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC verification engineer
Roseville, CA · On-site
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC verification engineer
Roseville, CA · On-site
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC verification engineer
Roseville, CA · On-site
ASIC verification engineer This role has been designed as ''Onsite' with an expectation that you ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Design Verification Engineer Compensation up to $225K DOE + strong benefits + long-term project stability. What You Need (All Roles) * 8+ years of pre-silicon ASIC / VLSI experience * Strong ...
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Design Verification Engineer Compensation up to $225K DOE + strong benefits + long-term project stability. What You Need (All Roles) * 8+ years of pre-silicon ASIC / VLSI experience * Strong ...
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Design Verification Engineer
Irvine, CA · On-site
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Job Title: Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High ...
Design Verification Engineer
Irvine, CA · On-site
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Job Title: Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High ...
ASIC design/verification engineer
Durham, NC · On-site
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
ASIC design/verification engineer
Durham, NC · On-site
ASIC design/verification engineer This role has been designed as 'Hybrid' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Design Verification Engineer
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Job Title: Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High ...
Design Verification Engineer
$146K - $178K/yr
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... Job Title: Design Verification Engineer Location: Santa Clara, CA Duration: 06 months (High ...
Principal ASIC verification engineer This role has been designed as 'Hybrid' with an expectation ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Principal ASIC verification engineer This role has been designed as 'Hybrid' with an expectation ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
SoC Verification Engineer
Austin, TX · On-site
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... SoC Verification Engineer Location: Austin, TX Duration: 06 months (High Possibility of an ...
SoC Verification Engineer
Austin, TX · On-site
Company Description Insilico is an End-to-End specialized VLSI, Embedded Design & Software services ... SoC Verification Engineer Location: Austin, TX Duration: 06 months (High Possibility of an ...
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Senior ASIC verification engineer This role has been designed as ''Onsite' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Senior ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Senior ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation that ... Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems.
Contract Vlsi Verification Engineer information
See salary details
$80K - $91.2K
1% of jobs
$91.2K - $102.5K
1% of jobs
$102.5K - $113.7K
1% of jobs
$113.7K - $124.9K
1% of jobs
$131.5K is the 25th percentile. Wages below this are outliers.
$124.9K - $136.1K
35% of jobs
The median wage is $138.3K / yr.
$136.1K - $147.4K
54% of jobs
$147.4K - $158.6K
1% of jobs
$158.6K - $169.8K
1% of jobs
$169.8K - $181K
2% of jobs
$181K - $192.3K
1% of jobs
$192.3K - $203.5K
1% of jobs
$80K
$142.6K
$203.5K
How much do contract vlsi verification engineer jobs pay per year?
As of Jun 22, 2026, the average yearly pay for contract vlsi verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.
What is the salary of a VLSI verification engineer?
The salary of a VLSI verification engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with skills in SystemVerilog, UVM, and verification tools can earn higher salaries.
Are VLSI engineers in demand?
VLSI verification engineers are in high demand due to the growth of semiconductor and integrated circuit industries. Companies seek professionals skilled in hardware description languages like Verilog and SystemVerilog, with expertise in simulation tools and verification methodologies, to develop complex chip designs efficiently.
How much do VLSI engineers get paid?
VLSI verification engineers typically earn between $80,000 and $130,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages and verification tools can earn higher salaries.
What is the difference between Contract Vlsi Verification Engineer vs Digital Design Engineer?
| Aspect | Contract Vlsi Verification Engineer | Digital Design Engineer |
|---|---|---|
| Primary Focus | Verifying VLSI chip designs to ensure functionality and performance | Designing digital circuits and systems from specifications |
| Skills & Certifications | Verilog/VHDL, SystemVerilog, simulation tools, verification methodologies | Verilog/VHDL, digital logic design, FPGA/ASIC design tools |
| Work Environment | Semiconductor companies, contract agencies, design teams | Semiconductor companies, hardware design firms, R&D labs |
| Industry Usage | Commonly used in chip verification projects | Used in chip and system design projects |
While both roles involve VLSI and digital design skills, the Contract Vlsi Verification Engineer primarily focuses on verifying and testing chip designs, whereas the Digital Design Engineer concentrates on creating and implementing digital circuits. Both roles require similar technical skills but serve different stages of the chip development process.
What engineers make $500,000?
Senior VLSI verification engineers with extensive experience, specialized skills in hardware description languages, and proficiency with verification tools can reach or exceed a $500,000 annual salary, especially in high-cost-of-living regions or within leading technology companies. Such compensation often includes bonuses, stock options, and other benefits. Achieving this level typically requires advanced certifications and a strong track record of successful project delivery.
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Job description
Company Description
EROS Technologies was founded with a simple motive of offering the clients exactly what they want, how they want and when they want it. By leveraging for its clients its technological edge and right-sourcing advantage, EROS in a short period of time has grown to become one of the most trusted strategic technology partners. Treating every client as the top priority, we customize our solutions and services to align with the unique needs of each client.
Job Description
Job Title: VLSI Verification Engineer
Location: Santa Clara, CA
Duration 6 Month Contract
Job description:
Verification engineers - OVM/UVM is Mandatory
CPU subsystem/DDR/Modem verification
Additional Information
All your information will be kept confidential according to EEO guidelines.
About Eros Technologies
Sourced by ZipRecruiter
We create a culture that inspires us to work smart, together. Experience Eros is dedicated to delivering services to all our Fortune 100 to Fortune 500, SME, and Enterprise customers in the USA, Canada, and India. Eros Technologies is a leading Global Consulting and IT services company, offering a wider variety of solutions customized to the needs of demanding industries and diversified business environments. We help clients move forward in every part of their businesses, from strategic planning to day-to-day operations by enhancing our consulting and outsourcing expertise with alliances and other capabilities. Eros can mobilize the right people, skills, and technologies to help its clients improve their performances. We create Solutions with the aim of increasing your organization’s efficiency, productivity, and profits.
Industry
Human resources consulting services
Company size
1,001 - 5,000 Employees
Headquarters location
Lewes, DE, US
Year founded
2015