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Contract Emulation Engineer Jobs (NOW HIRING)

Mythic

Senior Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

Mythic

Senior Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

INSPYR Solutions

System Enginneer

Redmond, WA · On-site

$55 - $64/hr

Redmond, WA (onsite) Duration: Long term contract Compensation: $55 - 64.00/hr. Work Requirements ... Develop and enhance software that integrates satellite simulation, channel emulation, and radio ...

Mythic

Senior Design Verification Engineer

Austin, TX · On-site

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

Mythic

Design Verification Engineer

Palo Alto, CA

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

Mythic

Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

Mythic

Design Verification Engineer

Austin, TX · On-site

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

Mythic

Design Verification Engineer

Austin, TX

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

Mythic

Design Verification Engineer

Austin, TX

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

Mythic

Design Verification Engineer

Palo Alto, CA · On-site

$120K - $225K/yr

... contracts across multiple markets. The salary range for this position is $120,000-$225,000 ... Leverage architecture models and emulation environments to help verify large AI network ...

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Contract Emulation Engineer information

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How much do contract emulation engineer jobs pay per hour?

As of May 30, 2026, the average hourly pay for contract emulation engineer in the United States is $53.63, according to ZipRecruiter salary data. Most workers in this role earn between $43.27 and $62.26 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Contract Emulation Engineer, and why are they important?

To thrive as a Contract Emulation Engineer, you need a strong background in hardware design, verification methodologies, and programming languages such as SystemVerilog, along with a relevant engineering degree. Familiarity with emulation platforms like Cadence Palladium, Mentor Veloce, or Synopsys ZeBu, and industry-standard verification tools, is typically required. Excellent problem-solving skills, attention to detail, and effective communication are crucial soft skills for collaborating with cross-functional teams and debugging complex systems. These capabilities are essential for efficiently validating hardware designs, ensuring product reliability, and meeting project deadlines in high-stakes environments.

What are some typical challenges Contract Emulation Engineers face when working with new hardware designs?

Contract Emulation Engineers often encounter challenges when integrating complex, new hardware designs into emulation platforms. These can include debugging compatibility issues, optimizing performance to match real-world scenarios, and ensuring accurate representation of the hardware's behavior. Collaboration with design engineers and verification teams is key to quickly resolving issues and delivering reliable results on tight project timelines. Staying updated with the latest emulation tools and methodologies also helps in overcoming these technical hurdles.

What are Contract Emulation Engineers?

Contract Emulation Engineers are specialized professionals who design, develop, and test hardware or software systems that replicate the functionality of electronic components or systems—often under a contract arrangement. Their work is crucial in industries like semiconductor, automotive, and aerospace, where they help validate designs before physical prototypes are built. They use tools such as FPGAs (Field Programmable Gate Arrays) and emulation platforms to simulate real-world performance, enabling faster and more cost-effective development cycles. Typically, they collaborate with design teams to ensure that emulated systems accurately mirror intended behaviors and facilitate efficient debugging.
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Contract Emulation Engineer jobs near you
Infographic showing various Contract Emulation Engineer job openings in the United States as of May 2026, with employment types broken down into 92% Full Time, 3% Part Time, and 5% Contract. Highlights an 71% Physical, and 29% Remote job distribution, with an average salary of $111,552 per year, or $53.6 per hour.
Senior Design Verification Engineer

Senior Design Verification Engineer

Mythic

Palo Alto, CA • On-site

$120K - $225K/yr

Full-time

Posted 24 days ago

Job description

We're hiring experienced Design Verification Engineers to play a key role in developing and verifying the designs that will bring our next-generation AI processors to life.
 
About Us:
Mythic is building the future of AI computing with breakthrough analog technology that delivers 100 the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from -40 C to +125 C, making it ideal for industrial, automotive, aerospace, and defense.
 
We've raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.
 
The salary range for this position is $120,000-$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.
 
Design Verification at Mythic:
At Mythic, our Design Verification (DV) team is central to ensuring the correctness and reliability of our novel digital dataflow architecture, which includes a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines that work together with our Analog Compute Engines to accelerate AI workloads. DV engineers collaborate closely with RTL design, architecture modeling, custom analog IP, compiler, emulation, and post-silicon teams to ensure the full system operates as intended.
 
Because today's AI workloads are too large and intricate to be fully verified in hardware alone, our team takes creative and rigorous approaches-combining simulation, modeling, and innovative verification strategies-to prove that neural networks will function correctly and efficiently. We welcome engineers at all levels of experience who are eager to tackle challenging verification problems and contribute to the success of our breakthrough AI hardware.
Responsibilities
  • Hands-on system-level and block-level verification.
  • Development of test plans and coverage plans.
  • Testbench development and execution using UVM or other advanced DV methodologies.
  • Creation of verification infrastructure and flows.
  • Leverage architecture models and emulation environments to help verify large AI network functionality on the design.
  • Collaborate with RTL designers and architects to verify subsystems such as scheduling fabrics, interconnects, DMA engines, and memory controllers.
Requirements
  • Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 8+ years of industry experience developing verification testbenches.
  • Knowledge of verification methodologies (UVM or similar).
  • Solid understanding of computer architecture, including datapaths, memory hierarchies, and interconnects.
  • Experience verifying one or more of the following: scheduling subsystems, high-performance interconnects, DMA engines, or memory subsystems.
  • Understanding of Verilog, SystemVerilog, and UVM.
  • Proven track record of first-pass silicon success.
  • Strong communication skills, both written and spoken.
Preferred Qualifications
  • Experience with emulation or FPGA prototyping for large-scale designs.
  • Knowledge of coverage-driven verification and advanced stimulus generation techniques.
  • Exposure to formal verification methods and tools.
  • Familiarity with power-aware and performance-driven verification flows.
  • Prior experience verifying AI, DSP, or other highly parallel architectures.
  • Strong scripting skills (Python or similar) for automation and infrastructure development.
At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.
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