Please find below the job details:
Title: Sr. FPGA Verification Engineer -
Client: Aerospace Location: Cedar Rapids, IA
Duration: 12 Months+ CTH (Performance Based) Description:
Sr FPGA Verification Engineer (ONSITE/HYBRID) Job Summary
• The Avionics Complex Device team is searching for a Principal/Senior level FPGA Verification Engineer to join our team. • This position is for an experienced, highly motivated Electrical or Computer Engineer that will be involved in the on-target verification and integration of FPGAs associated with a display product. • As an engineer within this organization, you will be employing best practice verification methodologies supporting our DAL-A certified Displays, Computing and Networking Products. Job Responsibilities
• Development of DO-254 DAL-A certifiable verification cases, procedures, and results artifacts.
• FPGA verification using inspection, analysis, and test methods.
• Develop FPGA on-target hardware tests.
• Perform FPGA on-target hardware integration and test within an onsite lab environment.
• Conduct and/or participate in peer reviews throughout product lifecycle.
• Communicate well and coordinate with engineers across domains as well as program management. Basic Qualifications:
• Must be able to work onsite in Cedar Rapids, IA 3-5 days per week.
• Bachelor’s degree in science, Technology, Engineering or Math (STEM) discipline and 5 years relevant experience or an Advanced degree and 3 years relevant experience.
• Experience using test equipment (oscilloscope, logic analyzer, multimeters, etc.)
• Experience with Linux (or Unix), scripting, C/C++, Visual Basic, Python, and/or Perl.
• Experience with VHDL.
• Familiarity with revision control concepts and tools (e.g. Subversion, Jira).
• Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, on projects with aggressive schedules and frequent milestones.
• Strong oral and written communication skills. Desired skills of a successful candidate:
• Experience with DO-254 design assurance activities for FPGA developments.
• Familiar with System Verilog and UVM.
• UVM Constrained Random Methodology.
• Experience interacting with domestic and international partners.