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Join Apple's Wireless Connectivity team developing state-of-the-art WiFi SoCs that power hundreds of millions of Apple products worldwide. You'll be part of our vertically integrated organization shaping next-gen wireless technology from concept through production. As a Wireless PHY Design Verification Engineer, you'll ensure first-time-right silicon success through sophisticated testbenches, comprehensive scenarios, and cutting-edge verification methodologies-enabling multi-gigabit wireless technology connecting the world!
Description
As a Wireless PHY Design Verification Engineer, you'll verify sophisticated WiFi PHY digital systems spanning time/frequency-domain processing, hardware acceleration, calibration engines, and protocol implementation. You'll architect verification strategies for high-rate, low-power, low-latency, and multi-link wireless features enabling advanced applications across Apple's product ecosystem. You'll own subsystem verification from test planning through coverage closure-building environments, constrained random scenarios, and applying analytics methodologies to deliver exceptional wireless silicon.","responsibilities":"Develop sophisticated UVM environments and bus functional models for complex DSP subsystems and IEEE 802.11 protocol.
Own subsystem verification from test planning and environment bring-up through feature closure.
Develop UVM testbench environments, bus functional models (BFMs), assertions, and infrastructure / DPIs to utilizing algorithm models.
Architect and implement constrained random scenarios exercising complex protocol interactions.
Apply data-driven verification closure through coverage tracking, issue tracking, gap identification, and metrics.
Drive verification strategy with cross-functional Systems / Design teams to achieve coverage closure across complex domains.
Preferred Qualifications
Knowledge of IEEE 802.11 wireless protocols, Bluetooth, Cellular, or similar communication systems.
Experience with applying / integrating System models utilizing DPIs.
Understanding of DSP algorithms verification strategies (Bit / Cycle matching, Assertions).
Experience with transaction-level modeling including packet-based approaches (scoreboarding, protocols).
Minimum Qualifications
Minimum requirement of a bachelor’s degree.
Track record of several tapeout cycles of sophisticated designs.
Experience verifying wireless, DSP, or digital communication systems.
Knowledge of ASIC verification flows with SystemVerilog / UVM including testbench architecture, scenario creation, and coverage-driven methodologies.
Experience developing verification environments, bringing up complex designs, and debugging simulations.
Experience with constrained random testing, functional coverage implementation, and assertion-based verification.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $122,700 and $214,300, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.