SoC Design Engineer
$156K - $160K/yr
SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...
$156K - $160K/yr
SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...
$156K - $160K/yr
SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS ... Develop, integrate, and validate IPs through the complete ASIC design flow: RTL coding in Verilog ...
$171K - $302K/yr
Familiarity with ASIC low power design techniques, including multiple supply domains configuration ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$171K - $302K/yr
Familiarity with ASIC low power design techniques, including multiple supply domains configuration ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$120K - $210K/yr
Preferred Qualifications Skilled in defining ASIC microarchitecture to meet functional requirements ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$120K - $210K/yr
Preferred Qualifications Skilled in defining ASIC microarchitecture to meet functional requirements ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Santa Clara, CA · On-site
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
Santa Clara, CA · On-site
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
San Diego, CA · On-site
Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified ... Skilled in defining ASIC microarchitecture to meet functional requirements while managing ...
San Diego, CA · On-site
Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified ... Skilled in defining ASIC microarchitecture to meet functional requirements while managing ...
Milpitas, CA · Remote
$95 - $100/hr
ASIC/SoC Design Qualification and Education: * Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or related technical field. Founded in 2010 and ...
Quick apply
Milpitas, CA · Remote
$95 - $100/hr
ASIC/SoC Design Qualification and Education: * Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or related technical field. Founded in 2010 and ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation with Altera Quartus or Xilinx Vivado * Experience designing/debugging SoC systems with AMBA-compliant ...
Quick apply
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation with Altera Quartus or Xilinx Vivado * Experience designing/debugging SoC systems with AMBA-compliant ...
$159K - $164K/yr
Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Minimum Qualifications: * Bachelor's degree in Electrical Engineering, with 5 years of relevant physical design ...
$159K - $164K/yr
Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Minimum Qualifications: * Bachelor's degree in Electrical Engineering, with 5 years of relevant physical design ...
Austin, TX · On-site
$122K - $232K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...
Austin, TX · On-site
$122K - $232K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...
Senior Physical Design / STA Engineer Location: Bay Area, CA / Austin, TX - CA 1st preference ... ASIC/SoC designs. Responsibilities * Perform full-chip and block-level physical design ...
Senior Physical Design / STA Engineer Location: Bay Area, CA / Austin, TX - CA 1st preference ... ASIC/SoC designs. Responsibilities * Perform full-chip and block-level physical design ...
SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband ...
Los Angeles, CA · On-site
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog ... Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL ...
Los Angeles, CA · On-site
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog ... Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL ...
Austin, TX · On-site
$122K - $232K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...
Austin, TX · On-site
$122K - $232K/yr
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...
Los Angeles, CA · On-site
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog ... Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL ...
Los Angeles, CA · On-site
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog ... Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL ...
Los Angeles, CA · On-site
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog ... Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL ...
Los Angeles, CA · On-site
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog ... Familiarity with the ASIC design flow.Knowledge of digital design, SoC architecture, and HDL ...
Irvine, CA · On-site
$146K - $178K/yr
This is a highly visible role, where you will be at the center of the ASIC debug efforts ... Knowledge of digital design, SoC architecture, and HDL languages like Verilog.Familiarity with ...
Irvine, CA · On-site
$146K - $178K/yr
This is a highly visible role, where you will be at the center of the ASIC debug efforts ... Knowledge of digital design, SoC architecture, and HDL languages like Verilog.Familiarity with ...
$120K - $210K/yr
This is a highly visible role, where you will be at the center of the ASIC debug efforts ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$120K - $210K/yr
This is a highly visible role, where you will be at the center of the ASIC debug efforts ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$120K - $210K/yr
This is a highly visible role, where you will be at the center of the ASIC design efforts ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$120K - $210K/yr
This is a highly visible role, where you will be at the center of the ASIC design efforts ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$120K - $210K/yr
This is a highly visible role, where you will be at the center of the ASIC design efforts ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$120K - $210K/yr
This is a highly visible role, where you will be at the center of the ASIC design efforts ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
$94K - $103.8K
16% of jobs
$103.8K - $113.6K
3% of jobs
$113.6K - $123.5K
4% of jobs
$126.3K is the 25th percentile. Wages below this are outliers.
$123.5K - $133.3K
6% of jobs
The median wage is $139.4K / yr.
$133.3K - $143.1K
33% of jobs
$143.1K - $152.9K
3% of jobs
$152.9K - $162.7K
2% of jobs
$169.2K is the 75th percentile. Wages above this are outliers.
$162.7K - $172.5K
12% of jobs
$172.5K - $182.4K
5% of jobs
$182.4K - $192.2K
4% of jobs
$192.2K - $202K
12% of jobs
$94K
$150.2K
$202K
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.
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Software development
1,001 - 5,000 Employees
Santa Clara, CA, US
1995