Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Quick apply
Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Quick apply
Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows. Our team brings deep experience in ...
Des Moines, WA · On-site
$18 - $22/hr
The Brush Attendant is responsible for ensuring smooth operations on the gaming floor by managing chip runs, assisting dealers, maintaining proper chip inventory, and providing support to poker games.
Des Moines, WA · On-site
$18 - $22/hr
The Brush Attendant is responsible for ensuring smooth operations on the gaming floor by managing chip runs, assisting dealers, maintaining proper chip inventory, and providing support to poker games.
Des Moines, WA · On-site
$18 - $22/hr
The Brush Attendant is responsible for ensuring smooth operations on the gaming floor by managing chip runs, assisting dealers, maintaining proper chip inventory, and providing support to poker games.
Des Moines, WA · On-site
$18 - $22/hr
The Brush Attendant is responsible for ensuring smooth operations on the gaming floor by managing chip runs, assisting dealers, maintaining proper chip inventory, and providing support to poker games.
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
Seattle, WA · On-site
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
Seattle, WA · On-site
$230K - $322K/yr
Supervise chip-level front-end integration and optimization throughout the development lifecycle and ensure successful production * Work with third-party design partners Minimum Qualifications:
Redmond, WA · On-site
$220K - $331K/yr
You'll work at the intersection of silicon, systems, and software, partnering cross-functionally with chip and system architects, as well as inference software engineers to drive data-backed design ...
Redmond, WA · On-site
$220K - $331K/yr
You'll work at the intersection of silicon, systems, and software, partnering cross-functionally with chip and system architects, as well as inference software engineers to drive data-backed design ...
Expert in full-chip/SOC-level floorplanning and integration -- physical implementation of cells and analog blocks/IPs, pin-ring generation, routing management, and full-wafer assembly -- with ...
Quick apply
Expert in full-chip/SOC-level floorplanning and integration -- physical implementation of cells and analog blocks/IPs, pin-ring generation, routing management, and full-wafer assembly -- with ...
Auburn, WA · On-site
$21.34/hr
Accurately and expediently perform cash, coin, chip, ticket, credit card, debit card, traveler's checks and personal checks cashing transactions, following regulatory, departmental and Company ...
Auburn, WA · On-site
$21.34/hr
Accurately and expediently perform cash, coin, chip, ticket, credit card, debit card, traveler's checks and personal checks cashing transactions, following regulatory, departmental and Company ...
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams. * Support your product through production and spaceflight. Required Qualifications * Bachelor's or Master ...
$190K - $280K/yr
Support chip bring-up and debug through close collaboration with post-silicon and test teams. * Support your product through production and spaceflight. Required Qualifications * Bachelor's or Master ...
Seattle, WA · On-site
$60K - $80K/yr
You'll help translate chip architecture breakthroughs and large-scale deployments into clear, credible stories - contributing to major product launches, customer wins, and technical announcements.
Seattle, WA · On-site
$60K - $80K/yr
You'll help translate chip architecture breakthroughs and large-scale deployments into clear, credible stories - contributing to major product launches, customer wins, and technical announcements.
We are looking for a Principal System Architect with a wealth of experience in shaping and bringing to fruition high-performance, high-volume System-on-Chip (SoC) platforms. The ideal candidate will ...
We are looking for a Principal System Architect with a wealth of experience in shaping and bringing to fruition high-performance, high-volume System-on-Chip (SoC) platforms. The ideal candidate will ...
Auburn, WA · On-site
$21.34/hr
Accurately and expediently perform cash, coin, chip, ticket, credit card, debit card, traveler's checks and personal checks cashing transactions, following regulatory, departmental and Company ...
Auburn, WA · On-site
$21.34/hr
Accurately and expediently perform cash, coin, chip, ticket, credit card, debit card, traveler's checks and personal checks cashing transactions, following regulatory, departmental and Company ...
$60K - $80K/yr
You'll help translate chip architecture breakthroughs and large-scale deployments into clear, credible stories - contributing to major product launches, customer wins, and technical announcements.
$60K - $80K/yr
You'll help translate chip architecture breakthroughs and large-scale deployments into clear, credible stories - contributing to major product launches, customer wins, and technical announcements.
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Contribution to revolutionizing chip and software technologies with global impact.
Quick apply
Contribution to revolutionizing chip and software technologies with global impact.
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Key job responsibilities Collaborate with communications systems, digital design, and chip implementation teams to specify and implement transceivers and RFIC front-end models which will delight ...
Redmond, WA · On-site
$119K - $234K/yr
We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who ...
Redmond, WA · On-site
$119K - $234K/yr
We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who ...
Redmond, WA · On-site
$140K - $235K/yr
Work with the integrated circuit designers and chip leads to determine the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging engineer to ...
Redmond, WA · On-site
$140K - $235K/yr
Work with the integrated circuit designers and chip leads to determine the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging engineer to ...
| Aspect | Chip | PCB Designer |
|---|---|---|
| Required Credentials | Electrical Engineering degree, VLSI/ASIC design certifications | Electrical Engineering or related degree, PCB design certifications (e.g., IPC) |
| Work Environment | Semiconductor fabrication labs, R&D centers | Electronics manufacturing, engineering offices |
| Industry Usage | Semiconductor industry, integrated circuit manufacturing | Consumer electronics, industrial equipment |
| Common Search/Comparison | Chip design, VLSI, ASIC | PCB layout, circuit board design |
In summary, a Chip focuses on designing integrated circuits at the silicon level, requiring specialized knowledge in VLSI and semiconductor fabrication. A PCB Designer, on the other hand, creates the physical layout of circuit boards used in electronic devices. Both roles are essential in electronics but differ significantly in scope, environment, and technical expertise.

Full-time
Posted 8 days ago
Full-time · On-site · San Jose, CA · Austin, TX or Taiwan
About Agentrys
Agentrys is building the next generation of design automation for the semiconductor industry.
Our mission is to enable every engineering organization to build its own self-improving agentic design workforce. Agentrys Studio combines AI agents, engineering knowledge, agent-native tools, advanced models, and continuous learning to automate complex chip-design workflows.
Our team brings deep experience in artificial intelligence, electronic design automation, semiconductor design, GPU-accelerated computing, and production software systems. We work closely with leading semiconductor companies to turn advanced research into technology that improves engineering productivity, design quality, and time to market.
The Role
We are looking for an exceptional Research Engineer to develop new technologies at the intersection of artificial intelligence, agentic systems, GPU-accelerated computing, and Electronic Design Automation.
You will identify important research problems, develop novel algorithms and agent-native tools, build working prototypes, and help deploy them in real semiconductor design environments. Your work may span AI agents, large language models, reinforcement learning, optimization, GPU-accelerated algorithms, verification, analog design, and other areas of chip design automation.
This role is ideal for someone who combines strong research ability with exceptional implementation skills and wants to see their ideas used in production—not remain only in papers or prototypes.
What You'll Do
Develop new AI and agentic methods for semiconductor design and verification.
Build novel agent-native tools and algorithms designed specifically for autonomous engineering workflows, rather than adapting interfaces built primarily for human users.
Develop GPU-accelerated algorithms for computationally intensive design, analysis, search, simulation, and optimization problems.
Create tools that expose design state, constraints, actions, feedback, and optimization objectives in forms that agents can reason over and use effectively.
Build agents that can understand engineering objectives, use EDA tools, execute multi-step workflows, analyze results, recover from failures, and improve over time.
Research and implement techniques involving large language models, reinforcement learning, parallel algorithms, search, optimization, program synthesis, and machine learning for engineering systems.
Develop solutions for workflows such as functional verification, analog and custom design, RTL development, synthesis, timing analysis, and physical design.
Design rigorous evaluation methods for engineering agents, including problems where design data is private, sparse, or customer-specific.
Translate promising research ideas into reliable, scalable product capabilities.
Integrate AI systems with simulators, formal tools, design databases, commercial EDA tools, GPU computing platforms, and customer engineering infrastructure.
Work directly with semiconductor engineers to understand complex workflows and identify high-impact automation opportunities.
Collaborate with research, product, platform, and solutions teams across San Jose, Austin, and Taiwan.
Contribute to patents, publications, technical presentations, and the broader development of Agentic Design Automation.
What We're Looking For
PhD or master's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
Strong programming skills in Python and proficiency in at least one systems language such as C++ or Rust.
Experience with machine learning frameworks such as PyTorch or JAX.
Demonstrated research or engineering experience in one or more of the following:
Electronic Design Automation
Semiconductor design or verification
Agentic AI or large language models
GPU-accelerated or parallel algorithms
Reinforcement learning
Combinatorial optimization
Program synthesis or code generation
Formal methods
Machine learning for engineering or scientific applications
Ability to take an ambiguous technical problem from initial formulation through experimentation, implementation, and evaluation.
Strong analytical, software engineering, optimization, and debugging skills.
High ownership, intellectual curiosity, and willingness to work across research and product boundaries.
Clear written and verbal communication skills.
Particularly Valuable Experience
Publications in leading EDA, AI, machine learning, systems, high-performance computing, or computer architecture venues.
Experience developing new EDA algorithms, optimization engines, design representations, or domain-specific tools.
Experience developing GPU-accelerated algorithms using CUDA, Triton, or related parallel-computing technologies.
Experience profiling and optimizing computational workloads across CPUs and GPUs.
Experience designing tools or environments for use by autonomous agents.
Experience with simulation, verification, synthesis, timing analysis, physical design, analog design, or layout.
Experience building agents that interact with tools, codebases, databases, or external environments.
Experience with LLM training, post-training, fine-tuning, retrieval, tool use, or evaluation.
Familiarity with Verilog, SystemVerilog, assertions, SPICE, TCL, or semiconductor design flows.
Experience with commercial EDA tools or production chip-design environments.
Experience deploying AI systems in enterprise or security-sensitive environments.
A strong record of implementation through research systems, open-source projects, production software, or technical competitions.
Why Agentrys
At Agentrys, you will have the opportunity to:
Help define a new category of semiconductor design technology.
Invent the agent-native algorithms and tools that will form the foundation of future automated design workflows.
Develop GPU-accelerated algorithms that make previously impractical design and optimization workflows possible.
Build AI systems that perform complex, consequential engineering work—not just generate recommendations.
Work with real semiconductor workflows, tools, and private engineering knowledge.
See your research deployed directly with leading chip-design organizations.
Work in a small, highly technical team where individual contributions can shape the product and company.
Collaborate with colleagues across San Jose, Austin, and Taiwan.
Change how chips are designed, rather than focus on only one design or one point tool.
Sourced by ZipRecruiter
Recruiting and staffing services
51 - 200 Employees
Bellevue, WA, US
2014