We are now looking for a Senior I/O Architect for our NVLink chip to chip team! NVIDIA is seeking ... The base salary range is 224,000 USD - 356,500 USD for Level 5, and 272,000 USD - 431,250 USD for ...
We are now looking for a Senior I/O Architect for our NVLink chip to chip team! NVIDIA is seeking ... The base salary range is 224,000 USD - 356,500 USD for Level 5, and 272,000 USD - 431,250 USD for ...
NVIDIA is seeking an experienced technical leader passionate about defining advanced chip ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
NVIDIA is seeking an experienced technical leader passionate about defining advanced chip ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
We are now looking for a Senior I/O Architect for our NVLink chip to chip team! NVIDIA is seeking ... The base salary range is 224,000 USD - 356,500 USD for Level 5, and 272,000 USD - 431,250 USD for ...
We are now looking for a Senior I/O Architect for our NVLink chip to chip team! NVIDIA is seeking ... The base salary range is 224,000 USD - 356,500 USD for Level 5, and 272,000 USD - 431,250 USD for ...
Senior Architect, NVLink
Westford, MA · On-site
NVIDIA is seeking an experienced technical leader passionate about defining advanced chip ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
Senior Architect, NVLink
Westford, MA · On-site
NVIDIA is seeking an experienced technical leader passionate about defining advanced chip ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$147K - $202K/yr
Define chip-level architecture, integration requirements, performance targets, and power/area ... We believe in rewarding our employees with a competitive benefits package alongside their salary.
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$147K - $202K/yr
Define chip-level architecture, integration requirements, performance targets, and power/area ... We believe in rewarding our employees with a competitive benefits package alongside their salary.
Define chip-level architecture, integration requirements, performance targets, and power/area ... We believe in rewarding our employees with a competitive benefits package alongside their salary.
Quick apply
Define chip-level architecture, integration requirements, performance targets, and power/area ... We believe in rewarding our employees with a competitive benefits package alongside their salary.
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$350 - $520/hr
Define chip-level architecture, integration requirements, performance targets, and power/area ... We believe in rewarding our employees with a competitive benefits package alongside their salary.
Senior Principal Engineer- SoC/Chip Lead
San Jose, CA · On-site
$350 - $520/hr
Define chip-level architecture, integration requirements, performance targets, and power/area ... We believe in rewarding our employees with a competitive benefits package alongside their salary.
Principal Compute Architect
San Francisco, CA · On-site
$180K - $300K/yr
Defining high-level chip architecture optimized for low-latency, real-time systems (e.g., CNNs ... Salary The annual compensation is expected to be between $180,000 - $300,000. Exact compensation ...
Principal Compute Architect
San Francisco, CA · On-site
$180K - $300K/yr
Defining high-level chip architecture optimized for low-latency, real-time systems (e.g., CNNs ... Salary The annual compensation is expected to be between $180,000 - $300,000. Exact compensation ...
On/Off-Chip SI/PI Engineer
San Jose, CA · On-site
$150K - $320K/yr
Leverage understanding of DRAM on-chip architecture and its electrical characteristics ... Your Recruiter can share more about the specific salary range for the job location during the ...
New
On/Off-Chip SI/PI Engineer
San Jose, CA · On-site
$150K - $320K/yr
Leverage understanding of DRAM on-chip architecture and its electrical characteristics ... Your Recruiter can share more about the specific salary range for the job location during the ...
New
On/Off-Chip SI/PI Engineer
San Jose, CA · On-site
$150K - $320K/yr
Leverage understanding of DRAM on-chip architecture and its electrical characteristics ... Your Recruiter can share more about the specific salary range for the job location during the ...
On/Off-Chip SI/PI Engineer
San Jose, CA · On-site
$150K - $320K/yr
Leverage understanding of DRAM on-chip architecture and its electrical characteristics ... Your Recruiter can share more about the specific salary range for the job location during the ...
Senior GPU Architect
Santa Clara, CA · On-site
$152K - $206K/yr
Develop and enhance chip design infrastructure, including functional models and yield simulators ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
Senior GPU Architect
Santa Clara, CA · On-site
$152K - $206K/yr
Develop and enhance chip design infrastructure, including functional models and yield simulators ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
Senior GPU Architect
$152K - $206K/yr
Develop and enhance chip design infrastructure, including functional models and yield simulators ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
Senior GPU Architect
$152K - $206K/yr
Develop and enhance chip design infrastructure, including functional models and yield simulators ... Your base salary will be determined based on your location, experience, and the pay of employees in ...
Experience with systems-level/architectural/chip modeling, profiling, and analysis. * Strong combined RTL and C++ skillset. #LI-Hybrid Your base salary will be determined based on your location ...
Experience with systems-level/architectural/chip modeling, profiling, and analysis. * Strong combined RTL and C++ skillset. #LI-Hybrid Your base salary will be determined based on your location ...
Engage in architectural definition, silicon process and package selection, performance modeling ... The base salary range is 196,000 USD - 310,500 USD. You will also be eligible for equity and ...
Engage in architectural definition, silicon process and package selection, performance modeling ... The base salary range is 196,000 USD - 310,500 USD. You will also be eligible for equity and ...
... on-Chip (SoC) platforms. The ideal candidate will bring deep technical expertise across multiple ... The base salary range is 272,000 USD - 431,250 USD. You will also be eligible for equity and ...
... on-Chip (SoC) platforms. The ideal candidate will bring deep technical expertise across multiple ... The base salary range is 272,000 USD - 431,250 USD. You will also be eligible for equity and ...
Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ... The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for ...
Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ... The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for ...
SIPI Architect
San Jose, CA · On-site
$178K - $331K/yr
Work on test chip package design SI/PI optimization and verification. Work on evaluation board ... Please note that the salary range is a guideline and compensation may vary based on factors such as ...
SIPI Architect
San Jose, CA · On-site
$178K - $331K/yr
Work on test chip package design SI/PI optimization and verification. Work on evaluation board ... Please note that the salary range is a guideline and compensation may vary based on factors such as ...
Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ... The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for ...
Good architecture and RTL design knowledge * Strong expertise in modern C++, compiler, build ... The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for ...
... on-Chip (SoC) platforms. The ideal candidate will bring deep technical expertise across multiple ... The base salary range is 272,000 USD - 431,250 USD. You will also be eligible for equity and ...
... on-Chip (SoC) platforms. The ideal candidate will bring deep technical expertise across multiple ... The base salary range is 272,000 USD - 431,250 USD. You will also be eligible for equity and ...
... on-Chip (SoC) platforms. The ideal candidate will bring deep technical expertise across multiple ... The base salary range is 272,000 USD - 431,250 USD. You will also be eligible for equity and ...
... on-Chip (SoC) platforms. The ideal candidate will bring deep technical expertise across multiple ... The base salary range is 272,000 USD - 431,250 USD. You will also be eligible for equity and ...
Chip Architect Salary information
What is the average salary of a chip architect?
What are the key skills and qualifications needed to thrive as a chip architect, and why are they important?
What are some common career advancement opportunities for chip architects within the semiconductor industry?
What is the difference between Chip Architect Salary vs ASIC Design Engineer Salary?
| Aspect | Chip Architect Salary | ASIC Design Engineer Salary |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields |
| Work Environment | Design teams, R&D labs, hardware development facilities | Design teams, R&D labs, hardware development facilities |
| Industry Usage | Semiconductor companies, integrated circuit design firms | Semiconductor companies, integrated circuit design firms |
| Common Search/Comparison | Yes | Yes |
Both Chip Architects and ASIC Design Engineers typically hold similar educational backgrounds and work in semiconductor design environments. However, Chip Architects focus on overall chip architecture and high-level design decisions, often earning higher salaries due to their strategic role. ASIC Design Engineers concentrate on detailed circuit design and implementation. Understanding these differences helps in choosing the right career path or job focus within the industry.
What does a chip architect do?
What cities are hiring for Chip Architect Salary jobs?
Cities with the most Chip Architect Salary job openings:
What are the most commonly searched types of Chip Architect Salary jobs?
The most popular types of Chip Architect Salary jobs are:
What states have the most Chip Architect Salary jobs?
States with the most job openings for Chip Architect Salary jobs include:
What job categories do people searching Chip Architect Salary jobs look for?
The top searched job categories for Chip Architect Salary jobs are:

Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
7th of 245 rated software companies
Job description
We are now looking for a Senior I/O Architect for our NVLink chip to chip team!
NVIDIA is seeking an experienced technical leader passionate about defining advanced chip interconnects and protocols. You'll be part of a team responsible for defining next generation communications standards and products building on our current NVLink technology. The job scope ranges from developing initial product requirements, working with research, other architects, software/firmware and product development teams to shepherd the design through all phases of the product lifecycle.
What you will be doing:
Researching and crafting architecture solutions for chip-to-chip communication, optimizing for performance, area, power, security, and resiliency
Working with other design teams to define interfaces and flows between NVLink C2C blocks and the rest of the chip
Architectural modeling, validation, definition and documentation
Driving implementation across design, verification, firmware and software teams
Working with various teams to define NVLink C2C architecture
What we need to see:
MS or PhD in Electrical Engineering, Computer Science or Computer Engineering (or equivalent experience)
10+ years of relevant experience in some combination of architecture, design, and verification
Proven experience over link layer architecture (Transaction layer, Data link layer, Physical layer)
Experience with existing interconnects (PCIE, UCIE, Chip to Chip links) and knowledge of Industry standard protocols CHI/CXL/AXI
Able to define system architecture with NVLINK-C2C interconnects and SW stack around it
Collaborate with multi-functional teams including IP, SoC, physical/package design, firmware, electrical design, and validation to drive interconnect technology development and integration
Evaluate and trade off technical solutions to meet platform requirements for current and future products
Have completed and shipped multiple projects and are skilled at I/O Architecture
Experience leading projects from concept through product lifecycle, including pathfinding, prototyping, and deployment
NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative, autonomous and love a challenge, we want to hear from you!
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 224,000 USD - 356,500 USD for Level 5, and 272,000 USD - 431,250 USD for Level 6.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993