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About Etched

Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

Sohu is the first transformer-specific ASIC, and this role owns the accelerator software that makes it usable. You'll work across the layers that bring the chip to life and connect it to the host: the firmware that powers it on, the on-die software that initializes and manages it, and the kernel-level interface that exposes it to the rest of the inference stack. The work spans three tightly-coupled domains; ASIC firmware, microcontroller firmware, and host-side kernel and drivers. We hire engineers who are deep in one area and curious about the others.

This role spans across three work areas. You would specialize in one and contribute across the others as the team grows:

• ASIC Software— Collaboration on ASIC architecture, on-device inference instruction execution, CPU initialization, bootloaders, IO drivers, thermal and power management, DMA data transfer, on-chip application software, and validation. The code that runs on the die itself on its various embedded CPUs.

• Platform Software — microcontroller architecture and software for power sequencing, telemetry, and firmware update, and the foundational work that takes the chip from powered off to responsive. Involves close collaboration with the hardware team in the schematic and bring-up phases.

• Host-side Kernel and Drivers — the host software that presents Sohu as a device the rest of the stack can program against. Linux kernel drivers, PCIe-visible memory management, high-throughput low-latency ring buffer command queues, and SRIOV VF device management.

You may be a good fit if you have

• Bachelor's degree or equivalent practical experience.

• Strong software development fundamentals, including data structures and algorithms.

• Experience shipping and testing software on products that have gone to production.

• Depth in firmware design, implementation, and debugging.

• Familiarity with embedded architectures and the IO technologies that live at the silicon-to-host boundary — ARM, PCIe, DMA, HBM, DRAM, Ethernet, UART — and with systems concepts like scalability, fault tolerance, and consistency.

Strong candidates may also have experience with (Nice-to-have qualifications)

• Master's degree in Computer Science or equivalent technical experience.

• Hardware bring-up on a new chip or board, for the first time ever.

• Solving ambiguous, under-specified problems where the requirements emerge alongside the solution.

• Experience using low-level computer architecture details, like caching or AXI fabrics, to enable software to make decisions at the nanosecond-level.

• Strong communication, particularly when collaborating directly with engineers and across discipline boundaries.

Benefits

• Medical, dental, and vision packages with generous premium coverage

  • $500 per month credit for waiving medical benefits

• Housing subsidy of $2k per month for those living within walking distance of the office

• Relocation support for those moving to San Jose (Santana Row)

• Various wellness benefits covering fitness, mental health, and more

• Daily lunch + dinner in our office

• Unlimited compute budget subject to ROI justification

How we’re different

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.