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Assistant Telecom Circuit Design Jobs (NOW HIRING)

Qorvo, Inc.

Sr. Principal, Design Engineer

Chelmsford, MA

$168K - $218.30K/yr

... Assist with transistor-level layout and modeling for RF design RF board and module design Select ... Mentor other engineers in circuit design techniques * Drive process improvement that impacts the ...

Micron

DRAM Design Engineer

Boise, ID

Contribute to new product development by supporting circuit design, layout, and optimization across memory, logic, and analog domains * Assist with parasitic modeling, design validation, reticle ...

Micron Technology

DRAM Design Engineer

Boise, ID · On-site

Contribute to new product development by supporting circuit design, layout, and optimization across memory, logic, and analog domains * Assist with parasitic modeling, design validation, reticle ...

Micron Technology

Design Verification Engineer

Boise, ID · On-site

$129.40K - $158K/yr

Understanding of CMOS circuit design and mixed-signal verification * Knowledge of SystemVerilog, UVM, and SystemVerilog Assertions * Experience with HSPICE, VerilogHDL, FINESIM, and scripting ...

Peraton

Circuit Support Specialist, Senior

Herndon, VA

$104K - $166K/yr

Define and enforce standards, procedures, and runbooks for circuit design, acceptance testing ... Telecom/network engineering experience with demonstrated circuit planning/provisioning, carrier ...

Peraton

Circuit Support Specialist, Senior

Herndon, VA · On-site

$104K - $166K/yr

Define and enforce standards, procedures, and runbooks for circuit design, acceptance testing ... Telecom/network engineering experience with demonstrated circuit planning/provisioning, carrier ...

Stem Xpert

Mask Design Engineer

Hillsboro, OR

The company provides professional and technical expertise in the fields of Telecom, Education ... with the circuit team - Layout design, Verification, Post-layout fixes and sign-off of high ...

Peraton

Circuit Support Specialist, Senior

Herndon, VA · On-site

$104K - $166K/yr

Define and enforce standards, procedures, and runbooks for circuit design, acceptance testing ... Telecom/network engineering experience with demonstrated circuit planning/provisioning, carrier ...

Qorvo, Inc.

Sr. Principal, Design Engineer

Chelmsford, MA · On-site

$168K - $218.30K/yr

... Assist with transistor-level layout and modeling for RF design • RF board and module design • ... Mentor other engineers in circuit design techniques * Drive process improvement that impacts the ...

Alphacore Inc

Analog/Mixed-Signal Design Engineer

Tempe, AZ · On-site

$193.50K/yr

Your Responsibilities: * Assist in the design and simulation of analog and mixed-signal circuit blocks (e.g., amplifiers, comparators, DAC/ADC sub-blocks). * Support high-speed ADC architecture ...

Alphacore Inc

Analog Design- Internship

Arizona, LA

Responsibilities: Assist in the design, simulation, and layout of Analog/RF circuits Use Cadence tools for circuit design and verification Support silicon validation and testing Collaborate with a ...

Peraton

Circuit Support Specialist, SME

Herndon, VA · On-site

$135K - $216K/yr

Serve as technical authority for complex multi-provider circuit design, carrier strategy, SLA risk ... Telecom/network engineering experience with substantial experience leading circuit architecture ...

Micron

Semiconductor Design Engineer

Richardson, TX

Support physical layout design through circuit optimization and parasitic modeling. Collaborate with Micron's verification team to develop test patterns aligned with design specifications. Assist ...

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Senior Analog / Mixed-Signal IC Design Engineer

Senior Analog / Mixed-Signal IC Design Engineer

PsiQuantum

Palo Alto, CA • On-site

$237.50K/yr

Full-time

Posted 12 days ago

Job description

PsiQuantum's mission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems.
Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries.
Our architecture and approach is based on silicon photonics. By leveraging the advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photons don't feel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure.
In 2024, PsiQuantum announced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale.
PsiQuantum also develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact.
Quantum computing is not an extension of classical computing. It represents a fundamental shift-and a path to mastering challenges that cannot be solved any other way. The potential is enormous, and we have a clear path to make it real.
Come join us.
Job Summary:
We are seeking an experienced Analog/Mixed-Signal IC Design Engineer to design and deliver high-performance integrated circuits from concept through silicon validation and production. This role spans architecture, circuit design, and lab bring-up, with significant ownership and direct impact on real products.
Responsibilities:
  • Design and develop analog and mixed-signal circuit blocks, including:
    • Data converters (ADC/DAC)
    • Amplifiers (LNA, TIA, op-amps)
    • Bandgap references, biasing circuits, and regulators
  • Define system architecture and drive trade-offs across noise, linearity, power, area, and bandwidth.
  • Perform transistor-level design, simulation, and optimization using industry-standard tools.
  • Develop behavioral models (Verilog-A / SystemVerilog RNM) for system-level verification and architectural exploration.
  • Work closely with layout to ensure performance through parasitic-aware design and careful floorplanning.
  • Run post-layout simulations and sign-off analyses (PVT, Monte Carlo, corner analysis).
  • Collaborate with digital and verification teams for robust mixed-signal integration.
  • Drive/manage silicon bring-up, debug, and lab characterization.
  • Drive clear design documentation and participate in design reviews.
  • Take ownership of deliverables and drive work to completion, including under tight timelines.
  • Contribute across disciplines as needed, including outside primary specialization.
  • Maintain organized workflows to manage simulations, design iterations, and analysis results

Experience/Qualifications:
  • MS or PhD in Electrical Engineering or related field.
  • Strong fundamentals in analog circuit design and device physics.
  • Proven experience designing and taping out analog or mixed-signal ICs.
  • Expertise in CMOS or SiGe design across one or more process nodes.
  • Proficiency with SPICE-based simulation tools (e.g., Spectre, HSPICE).
  • Deep understanding of noise, mismatch, stability, and nonlinearity.
  • Ability to design from first principles and solve complex circuit problems creatively.
  • Strong organizational skills to manage large design spaces (corners, Monte Carlo, trade-offs).
  • Demonstrated ownership mindset with a focus on delivering high-quality result.

Preferred Qualifications:
  • Experience with data converters, RF/analog front-ends, or high-speed interfaces.
  • Experience with both mature and advanced process nodes (FinFET or beyond) a plus.
  • Hands-on experience with silicon validation and lab debugging.
  • Experience contributing across full chip development cycles.
  • Experience with Cadence Virtuoso design environment.
  • Hands-on experience with layout, tapeout, and bench validation.
  • Familiarity with SystemVerilog RNM and/or Verilog-A modeling.

What We Value
  • First-principles thinking and strong engineering judgment.
  • Ability to navigate complex trade-offs across performance, power, and area.
  • Ownership from architecture through silicon validation.
  • Clear and effective communication in cross-functional teams.
  • Intellectual curiosity and a drive to continuously learn new tools, domains, and techniques.
  • Flexibility to contribute beyond core responsibilities in a fast-paced environment.
  • Strong organizational discipline when working across many design iterations.
  • Receptiveness to feedback and commitment to continuous improvement.
  • Reliability and accountability in meeting commitments.
  • Willingness to go the extra mile to meet critical milestones

PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws.
Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to recruiting@psiquantum.com
We are not accepting unsolicited resumes from employment agencies.
The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located. Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future.
U.S. Base Pay Range
$145,000-$165,000 USD
Bay Area Pay Range
$180,000-$197,000 USD

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