SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Quick apply
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Quick apply
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Quick apply
SerDes architect and development lead focused on PAM4 ADC and DAC based wireline technologies. The ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis ...
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis ...
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis ...
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis ...
Principal Engineer, Digital IC Design and Architecture
Beaverton, OR · On-site
$210K/yr
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block- and top-level linting, CDC analysis, and power analysis. Assist with synthesis ...
Principal Engineer, Digital IC Design and Architecture
Beaverton, OR · On-site
$210K/yr
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block- and top-level linting, CDC analysis, and power analysis. Assist with synthesis ...
What You Can Expect Complete responsibility for PCIe/Serdes PHY Validation in post-silicon ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
What You Can Expect Complete responsibility for PCIe/Serdes PHY Validation in post-silicon ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Your Team, Your Impact The PCIe Gen 6, Gen 7 and High-speed Serdes product lines are built on a 10 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Your Team, Your Impact The PCIe Gen 6, Gen 7 and High-speed Serdes product lines are built on a 10 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
What You Can Expect Complete responsibility for PCIe/Serdes PHY Validation in post-silicon ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
What You Can Expect Complete responsibility for PCIe/Serdes PHY Validation in post-silicon ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
... ; assist with fiber handling and alignment. * Correlate component-level PIC data (e.g., DCA spot-checks of EAMs and PDs) with full SerDes-driven link performance. * Execute validation test plans ...
... ; assist with fiber handling and alignment. * Correlate component-level PIC data (e.g., DCA spot-checks of EAMs and PDs) with full SerDes-driven link performance. * Execute validation test plans ...
... ; assist with fiber handling and alignment. * Correlate component-level PIC data (e.g., DCA spot-checks of EAMs and PDs) with full SerDes-driven link performance. * Execute validation test plans ...
... ; assist with fiber handling and alignment. * Correlate component-level PIC data (e.g., DCA spot-checks of EAMs and PDs) with full SerDes-driven link performance. * Execute validation test plans ...
... ; assist with fiber handling and alignment. * Correlate component-level PIC data (e.g., DCA spot-checks of EAMs and PDs) with full SerDes-driven link performance. * Execute validation test plans ...
... ; assist with fiber handling and alignment. * Correlate component-level PIC data (e.g., DCA spot-checks of EAMs and PDs) with full SerDes-driven link performance. * Execute validation test plans ...
Define and architect low-power DSP architectures for 224G PAM4 and 448G SerDes designs, driving key ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Quick apply
Define and architect low-power DSP architectures for 224G PAM4 and 448G SerDes designs, driving key ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Principal SW Developer
Auburn Hills, MI · On-site
$127K - $171K/yr
... assist, recording/streaming) across embedded SoC and ECU platforms development lifecycle, from ... Integration: Integrate camera drivers (GMSL/FPD/CSI), SerDes, and SoC video pipelines; manage ...
Principal SW Developer
Auburn Hills, MI · On-site
$127K - $171K/yr
... assist, recording/streaming) across embedded SoC and ECU platforms development lifecycle, from ... Integration: Integrate camera drivers (GMSL/FPD/CSI), SerDes, and SoC video pipelines; manage ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Silicon Validation, Test & Characterization Engineer (title will reflect experience)
Mundelein, IL · On-site
Define and drive comprehensive post-silicon validation plans for multi-Gbps SerDes, PHYs, and ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Quick apply
Silicon Validation, Test & Characterization Engineer (title will reflect experience)
Mundelein, IL · On-site
Define and drive comprehensive post-silicon validation plans for multi-Gbps SerDes, PHYs, and ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Assistant Serdes information
What is the difference between Assistant Serdes vs Serdes Technician?
| Aspect | Assistant Serdes | Serdes Technician |
|---|---|---|
| Credentials | Typically high school diploma or equivalent; on-the-job training | Technical certifications or associate degree often preferred |
| Work Environment | Manufacturing or data center settings, assisting with equipment setup | Maintenance, troubleshooting, and repairing Serdes equipment |
| Job Responsibilities | Supporting Serdes operations, basic testing, and monitoring | Performing detailed diagnostics, repairs, and calibration |
Assistant Serdes roles focus on supporting Serdes operations with basic tasks, while Serdes Technicians handle advanced troubleshooting and repairs. The Technician position generally requires more technical certifications and hands-on experience, making it a more specialized role within the same industry.
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Full-time
Re-posted 17 days ago
Job description
- 10+ years of experience in high-performance analog or mixed-signal IC development in advanced CMOS processes
- Thorough familiarity with high-speed PAM4 architectures and topologies
- Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL, CTLEs, CDRs, etc.
- Thorough understanding of equalization techniques (both analog and digital)
- Must have a track record of successfully taking designs to production
- Ability to work with customers to define products that address needs
- Must have experience with evaluating silicon on bench and familiarity with standard lab equipment
- Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis
- Experience with analog and digital behavioral modeling, and/or synthesis of digital control blocks
- Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools
- MATLAB understanding would be preferred but not mandatory
- Familiar with designing circuits for electromigration and ESD compliance in submicron CMOS process
- Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes
- Must be able to work independently, create and adhere to schedules
- Must possess strong written and verbal communication skills with an ability to work with teams spread across geographic locations
- Should be able to seek help proactively as well as share and pass on knowledge
About Omni Design Technologies
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
11 - 50 Employees
Headquarters location
Milpitas, CA, US
Year founded
2015